1 Target Library
Design Compiler uses the target library to build a circuit. During mapping, Design Compiler selects functionally correct gates from the target library. It also calculates the timing of the circuit, using the vendor-supplied timing data for these gates.
2 Setting the Target Technology Library
After you set the library search path, you need to specify the target technology library for synthesis using the library attribute.
1) To specify a single library:
rc:/> set_attribute library lib_name.lbr /
RTL Compiler will use the library named lib_name.lbr for synthesis. RTL Compiler can also accommodate the .lib (Liberty) library format. In either case, ensure that you specify the library at the root-level (“/”).
Note: If the library is not in a previously specified search path, specify the full path, as follows:
rc:/> set_attribute library /usr/local/files/ lib_name .lbr
2) To specify a single library compressed with gzip:
rc:/> set_attribute library lib_name.lbr.gz /
3) To append libraries:
rc:/> set_attribute library {{lib1.lib lib2.lib}}
After lib1.lib is loaded, lib2.lib is appended to lib1.lib. This appended library retains the lib1.lib name.
3 XFAB
set DESIGN_KITS /DesignKits/XH018/pdk_xh018_v511/Digital_Libs
#Lib files set DCELL_FAST D_CELLS_JI_LPMOS_CPF_fast_1_98V_m40C.lib set DCELL_TYP D_CELLS_JI_LPMOS_CPF_typ_1_80V_25C.lib set DCELL_SLOW D_CELLS_JI_LPMOS_CPF_slow_1_62V_125C.lib
There are three types library for synthesis in XFAB. Usually we use "slow" for critical component synthesis, after layout with "fast" library for synthesis or normal whole system, while "typ" is not used.
