Reading Notes< Verilog Digital System Design>

Reading Notes< Verilog Digital System Design>

1.       The first step of RTL design is the partitioning of the design into a data part and control part.
The data part consists of data components and the bussing structure of the design and the control part is usually a state machine generating control signals that control the flow of data in the data part.

2.       Data components generally consist of multiplexers for bus specifications, registers for data storage, flip-flops for flags, and combinational logic units for arithmetic and/or logical operations on data.

3.       Two main features that characterize hardware languages are timing and concurrency. Timing is associated with values that are assigned to hardware carriers, while concurrency refers to simultaneous operation of various hardware components. Because of these features, data types and operators take new definitions in hardware languages and must be looked at differently from those of software languages.