XPS Project Files

XPS Project Files

Xilinx® EDK has several project file types. Except where otherwise noted, you can edit these files according to your design needs.

Project Files

• XMP

A Xilinx Microprocessor Project (XMP) file is the top-level project file for an EDK design and is used for project management. Do not edit this file.

• BSB

The Base System Builder (BSB) file is the playback file generated by the Base System Builder. You can use it to create new projects with pre-defined options. You cannot edit this file.

Input Files

• BBD

The Black Box Definition (BBD) file manages the file locations of optimized hardware netlists for the black-box sections of your peripheral design.

• MHS

The Microprocessor Hardware Specification (MHS) file defines the hardware component. The MHS file serves as an input to the Platform Generator (Platgen) tool. An MHS file defines the configuration of the embedded processor system, and includes the following:

• Bus architecture
• Peripherals
• Processor
• System Connectivity
• Address space
• MPD

Microprocessor Peripheral Definition (MPD) file defines the interface for the peripheral. An MPD file has the following characteristics:

• Lists ports and default connectivity for bus interfaces.
• Lists parameters and default values.
• Any MPD parameter is overwritten by the equivalent MHS assignment.
• PAO

A Peripheral Analyze Order (PAO) file contains a list of Hardware Description Language (HDL) files that are needed for synthesis, and defines the analyze order for compilation.

• UCF

The User Constraints File (UCF) specifies timing and placement constraints for the FPGA Design.

Implementation Files

• BitGen Options File

The BitGen options file is etc/bitgen.ut. This file contains options for the Bitstream generation tool.

• iMPACT Command File

The iMPACT command file is etc/download.cmd, a script file used for downloading bitstreams using iMPACT.

• Implementation Options File

The implementation options file is etc/fast_runtime.opt. This file is the design implementation command-line options to the ISE® implementation tools, such as MAP and PAR.

Output Files

• BMM

A Block RAM Memory Map (BMM) file is a text file that has syntactic descriptions of how individual block RAMs constitute a contiguous logical data space. When updating the FPGA bitstream with memory initialization data (typically the executable program), the Data2MEM utility uses the BMM file to direct the translation of data into the proper initialization form. Although the BMM file is a text file direct editing is not recommended. This file is generated by the Platform Generator (Platgen) and updated with physical location information by the Bitstream Generator tool (BitGen). Refer to the Embedded System Tools Reference Manual for more information.

• ELF

The Executable and Linkable Format (ELF) is a common standard in computing. An executable or executable file, in computer science, is a file whose contents are meant to be interpreted as a program by a computer. Most often, they contain the binary representation of machine instructions of a specific processor, but can also contain an intermediate form that requires the services of an interpreter to be run.

• HDL Files

These files are generated either in the HDL or in simulation directory. There are wrapper HDL files for each core instance, and then an HDL file for the entire system. For more details, please refer to chapters on platgen and simgen.

• MHS

The MHS file defines the hardware component. The MHS file serves as an input to the Platform Generator (Platgen) tool. An MHS file defines the configuration of the embedded processor system, and includes the following:

• Bus architecture
• Peripherals
• Processor
• System connectivity
• Address space
• NGC

The NGC file is a netlist that contains logical design data and constraints. This file replaces both Electronic Data Interchange Format (EDIF) and Netlist Constraints File (NCF) files.