Weaknesses of CDCL Solvers
Armin Biere
Johannes Kepler University
Linz, Austria
讲座的时间、地点:The Fields Institute, Toronto, Canada Tuesday, August 16, 2016
Abstract:
Even though the basic CDCL scheme is already quite effective, a SAT solver requires careful implementation of many additional techniques to achieve state-of-the-art performance.
译文:即使基本的CDCL方案已经非常有效,一个SAT求解器仍然需要仔细地实现许多其他技术来实现最先进的性能
Probably most important are decision heuristics and their implementation, followed by data-structures for fast propagation, garbage collection schemes for reclaiming inactive learned clauses, then preprocessing techniques, and finally restart scheduling.
译文:可能最重要的是决策启发式及其实现,其次是用于快速传播的数据结构,用于回收非活动学习子句的垃圾收集方案,然后是预处理技术,最后是重新启动调度。
Our recent results revisiting decision heuristics as well as restart schemes on one hand simplified our understanding of what is essential for fast SAT solvers, but on the other hand revealed weaknesses both in SAT solving technology and how it is evaluated empirically.
译文:我们最近的结果重新审视决策启发式和重新启动方案,一方面简化了我们对什么是快速SAT解决者的必要的理解,但另一方面揭示了在SAT解决技术和如何评估它的经验的弱点。
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BIO (个人小传)
Since 2004 Prof. Armin Biere is a Full Professor for Computer Science at the Johannes Kepler University in Linz, Austria, and chairs the Institute for Formal Models and Verification. 译文:Armin Biere教授自2004年起担任奥地利林茨约翰内斯开普勒大学计算机科学的全职教授,并担任形式模型与验证研究所的主席。 |
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Between 2000 and 2004 he held a position as Assistant Professor within the Department of Computer Science at ETH Zürich, Switzerland. In 1999 Biere was working for a start-up company in electronic design automation after one year as Post-Doc with Edmund Clarke at CMU, Pittsburgh, USA. In 1997 Biere received a Ph.D. in Computer Science from the University of Karlsruhe, Germany. 译文:2000年至2004年,他在瑞士苏黎世联邦理工学院计算机科学系担任助理教授。1999年,Biere在美国匹兹堡CMU的Edmund Clarke做了一年博士后之后,在一家新兴的电子设计自动化公司工作。1997年,比尔获得了德国卡尔斯鲁厄大学的计算机科学博士学位。 |
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His primary research interests are applied formal methods, more specifically formal verification of hardware and software, using model checking, propositional and related techniques. 译文:他的主要研究兴趣是应用形式化方法,更具体的是硬件和软件的形式化验证,使用模型检查、命题和相关技术。
He is the author and co-author of more than 120 papers and served on the program committee of more than 110 international conferences and workshops.译文:他是120多篇论文的作者和合著者,并在110多个国际会议和研讨会的项目委员会任职。 His most influential work is his contribution to Bounded Model Checking. Decision procedures for SAT, QBF and SMT, developed by him or under his guidance rank at the top many international competitions and were awarded 57 medals including 32 gold medals. 译文:他最具影响力的工作是他对有限模型检验的贡献。他所开发或指导的SAT、QBF和SMT决策程序,在许多国际比赛中名列前茅,获奖牌57枚,其中金牌32枚。 |
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Besides organizing several workshops Armin Biere was co-chair of SAT'06, and FMCAD'09, was PC co-chair of HVC'12, and co-chair of CAV'14. He serves on the editorial boards of the Journal on Satisfiability, Boolean Modeling and Computation (JSAT), the Journal of Automated Reasoning (JAR), and the journal for Formal Methods in System Design (FMSD).译文:他在满足性、布尔建模和计算期刊(JSAT)、自动推理期刊(JAR)和系统设计中的形式化方法期刊(FMSD)的编委会任职。 | |
He is an editor of the Handbook of Satisfiability and initiated and organizes the Hardware Model Checking Competition (HWMCC). Since 2011 he serves as chair of the SAT Association and since 2012 on the steering committee of FMCAD. In 2006 Armin Biere co-founded NextOp Software Inc. which was acquired by Atrenta Inc. in 2012.译文:2011年以来,他担任SAT协会主席,2012年以来担任FMCAD指导委员会成员。2006年,阿明·比尔与人共同创立了NextOp Software Inc.,该公司于2012年被Atrenta Inc.收购。 |
slider——Evaluating CDCL Variable Scoring Schemes
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(Exponential) Variable State Independent Decaying Sum (VSIDS) empirically one of the most important features of state-of-the-art solvers no formal argument “why it works”译文:没有正式的论证"为什么它有效" “Trying to Understand the Power of VSIDS”
reconsider simpler alternatives ------particularly variable move to front schemes (VMTF) shows that VMTF is as good as VSIDS (and explains boths) |
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decision heuristics consist of
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phase saving [PipatsrisawatDarwiche’07]
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we consider only variable selection as decision heuristic here
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variable selection and decision heuristic boils down to
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how to compute scores
more precisely the exponential variant (EVSIDS) of MiniSAT! |
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data structures for finding decision variables
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data structure depends on how scores are computed and vice versa | |
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zero order scheme = static scores
first order schemes = dynamic but state less
second order schemes: variable score depends on history of search
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Variable Move To Front | |
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Siege SAT solver [Ryan’04] used variable move to front (VMTF)
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original implementation severely restricted
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as consequence VMTF not used in state-of-the-art solvers 译文:因此,VMTF不用于最先进的解决方案 |
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MiniSAT’s Exponential VSIDS (EVSIDS) | |
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floating point scores
actually, instead of updating scores of all variables (at every conflict)
priority queue of variables ordered by score
normalized VSIDS (NVSIDS) ∈ [0,1] as (theoretical) model [Biere’08] + video |
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Summary Variable Scoring Schemes |
Fast VMTF Implementation | |
fast simple implementation for caching searches(缓存搜索) in VMTF [Biere’15]
time-stamp list entries with insertion time 译文:带有插入时间的时间戳列表条目
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solved SAT competition 2014 application track instances (ordered by time) |
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solved SAT competition 2014 application track instances (ordered by time) |
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SAT'16 Competition Application Benchmarks (sorted by percentage run−time) |
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Conclusion Part I |
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surveyed and classified variable selection / scoring schemes 译文:调查和分类变量选择/评分方案
VMTF was considered to be obsolete 译文:VMTF被认为是过时的
threads to validity 线程的有效性
Splatz: SAT solver only based on VMTF http://fmv.jku.at/splatz |
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Part II
Evaluating CDCL Restart Schemes [POS’15 paper with Andreas Frohlich] ¨
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1 | Post SAT Competition 2014 Analysis |
Lingeling actually barely won
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two main reasons
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the POS’15 paper is about lessons learned while
original longer slide set at http://fmv.jku.at/biere/talks/Biere-POS15-talk.pdf |
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Buckets |
application track instances clustered in buckets (by the organizers):
2d-strip-packing (4), argumentation (20), bio (11), crypto-aes (8), crypto-des (7), crypto-gos (9), crypto-md5 (21), crypto-sha (29) , crypto-vpmc (4), diagnosis (28), fpga-routing (1), hardware-bmc (4), hardware-bmc-ibm (18), hardware-cec (30), hardware-manolios (6), hardware-velev (27), planning (19), scheduling (30), scheduling-pesp (3), software-bit-verif (9), software-bmc (6), symbolic-simulation (1), termination (5)
in total 300 instances clustered in 23 buckets 译文:总共300个实例聚集在23个桶中 |
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lingeling−sc2014 versus SWDiA5BY |
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Restarts in CDCL |
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1 Status run_CDCL_loop_with_restarts () { 2 for (;;) { 3 if (bcp ()) { 4 if (restarting ()) restart (); 5 else if (!decide ()) return SATISFIABLE; 6 } else { 7 conflicts++; 8 if (!analyze ()) return UNSATISFIABLE; 9 } 10 } 11 }
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Restart Scheme Examples | |
1 bool restarting () { 2 return conflicts >= limit; 3 } 4 5 void static_uniform_restart () { 6 restarts++; 7 limit = conflicts + interval; 8 backtrack (0); 9 } 10 11 void static_geometric_restart () { 12 limit = conflicts + interval * pow (1.5, ++restarts); 13 backtrack (0); 14 } 15 16 void luby_restart () { 17 limit = conflicts + interval * luby (++restarts); 18 backtrack (0); 19 } |
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Restart Scheme Classification | |
static schemes
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dynamic schemes
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Comparing Static but Non-Uniform Restart Schemes
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Conclusion Part II | |
data and source: http://fmv.jku.at/evalrestart/evalrestart.7z | |
optimal restart interval varies with benchmark bucket
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presented an EMA variant of the Glucose restart scheme
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future work
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Part III
Weaknesses of CDCL for Equivalence Checking (miters) CDCL has a hard time to learn the right clauses fast restarts important for miters。 | |
Miter (斜接)
hyper-binary resolve multiple binary clauses in “parallel”:
thus “in principle” hyper-binary resolution can simulate structural hashing but we do not know how to implement it fast (without having the circuit and including equivalence literal substitution)
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Software Architecture of our Boolector SMT Solver
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Solving Miters with CDCL Requires Restarts译文:用CDCL解决Miters需要重新启动 |
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trivial miters of identical circuits
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point of Yakau Novikov at our predecessor Dagstuhl meeting in 2015
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so frequent restarts are useful here
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Challenges Part III |
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how to do equivalence checking on the CNF level
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another (unpublished) partial solution:
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recover / use circuit structure
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Part IV | |
Arithmetic Reasoning Hard for CDCL 译文:CDCL的算术推理很困难 |
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Commutativity of Bit-Vector Multiplication 译文:位向量乘法的交换性
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Arithmetic Circuit Equivalence Checking译文:算术电路等价性检验 |
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Challenge Part IV |
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Problem
Conjecture 猜想
Research Question
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Overall Conclusion
decision heuristics
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restarts
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miters
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arithmetic reasoning 计算推理
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