ALLEGRO17.4的原理图DRC检查

 下面做个检查说明

 

check single node nets——检查单节点网络;

check unconnected bus net——检查未连接的总线网络;

check no driving source and Pin type connect——检查驱动接收等Pin Type的特性,这些在高速仿真时用到;

check unconnected pins——检查未连接的管脚;

check duplicate net names——检查重复的网络名称;

check SDT compatibility——检查SDT兼容性;

check off-page connector connect——检查跨页连接的正确性;

check hierarchical port connect——检查层次图的连接性;


Reports:

Report all net names——导出所有网络的名称;

Report misleading tap connection——导出误导的分接连接,不明白;

Report off_grid object——导出网格对象;

Report hierarchical ports and off-page connection:导出分层端口和分页图纸间接口的连接;
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版权声明:本文为CSDN博主「jiangchao3392」的原创文章,遵循CC 4.0 BY-SA版权协议,转载请附上原文出处链接及本声明。
原文链接:https://blog.csdn.net/jiangchao3392/article/details/115300984

 

posted @ 2023-11-06 15:51  花小宝宝  阅读(377)  评论(0编辑  收藏  举报