摘要: #define PWM BIT6// Description: This program generates one PWM output on P1.2 or P1.6 using// Timer_A configured for up mode. The value in CCR0, 25-1, defines the PWM// period and the value in CCR1 the PWM duty cycles.// A 50% duty cycle on P1.6.// ACLK = na, SMCLK = MCLK = TACLK = default DCOvoid P 阅读全文
posted @ 2013-06-27 20:24 wwjdwy 阅读(662) 评论(0) 推荐(0) 编辑