Makefile

objects = main.o kbd.o command.o display.o \
insert.o search.o files.o utils.o

edit : $(objects)
cc -o edit $(objects)
$(objects) : defs.h
kbd.o command.o files.o : command.h
display.o insert.o search.o files.o : buffer.h

.PHONY : clean
clean :
rm edit $(objects)

########################end##############################
make can figure them out: it has an implicit rule for updating a ‘.o’ file from a
correspondingly named ‘.c’ file using a ‘cc -c’ command. For example, it will use the recipe
‘cc -c main.c -o main.o’ to compile ‘main.c’ into ‘main.o’

 

 

 

 

###############

CC=g++
CFLAGS=-c -Wall
LDFLAGS=
SOURCES=main.cpp hello.cpp factorial.cpp
OBJECTS=$(SOURCES:.cpp=.o)
EXECUTABLE=hello

all: $(SOURCES) $(EXECUTABLE)
	
$(EXECUTABLE): $(OBJECTS) 
	$(CC) $(LDFLAGS) $(OBJECTS) -o $@

.cpp.o:
	$(CC) $(CFLAGS) $< -o $@

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If you understand this last example, you could adapt it to your own personal projects changing only 2 lines, no matter how many additional files you have !!!.