计算机体系结构会议及论文
会议
JILP：Journal of Instruction-Level Parallelism
MICRO：IEEE/ACM International Symposium on Microarchitecture
开源架构
（1）玄铁910
- Xuantie-910: A Commercial Multi-Core 12-Stage Pipeline Out-of-Order 64-bit High Performance RISC-V Processor with Vector Extension
（2）BOOMv3： - Zhao, Jerry, et al. "Sonicboom: The 3rd generation berkeley out-of-order machine." Fourth Workshop on Computer Architecture Research with RISC-V. 2020.
- https://docs.boom-core.org/en/latest/sections/intro-overview/boom.html
