linux设备树实现多个中断父(interrupt-parent)节点
方法一:
- interrupts-extended: 指定中断和父中断的另一种形式,允许多个父中断。这优先于'interrupts'和'interrupt-parent'。
#interrupt-cells = <2>; interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
知识点:
描述产生中断的设备的节点必须包含“interrupts”属性或“interrupts-extended”属性,或者两者都包含。如果两者都存在,则后者应优先;提供前者可能只是为了与不识别后者的软件兼容。这些属性包含一个中断说明符列表,每个输出一个中断。中断说明符的格式由中断路由到的中断控制器决定。
Example:
interrupt-parent = <&intc1>; interrupts = <5 0>, <6 0>;
“interrupt-parent”属性用于指定中断路由到的控制器,并包含一个指向中断控制器节点的phandle。此属性是继承的,因此可以在中断客户端节点或其任何父节点中指定。“Interrupts”属性中列出的中断总是引用节点的中断父节点。
当一个节点需要引用多个中断父节点时,“interrupts-extended”属性是一种特殊的形式。此属性中的每个条目都包含父phandle和中断说明符。"interrupts-extended"只能在设备有多个中断父节点时使用。
Example:
interrupts-extended = <&intc1 5 1>, <&intc2 1 0>;
方法二:
interrupts = <0 1 2>; interrupt-map = <0 &intc 0 134 0 1 &intc 0 140 0 2 &spmi 0 0x9 0 0>; interrupt-names = "core_irq", "async_irq", "pmic_id_irq"; interrupt-map-mask = <0 0 0 0>;
intc节点的#interrupt-cells值为<3>,spmi节点的#interrupt-cells值为4(这意味着需要在各自的phandles中使用不同的参数)。
interrupt-names字段是可选的,但是允许你通过名称而不是代码中的数字请求irq(例如,使用platform_get_irq_byname()而不是platform_get_irq())。
参考-->kernel document:
# cat Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.txt Broadcom STB "UPG GIO" GPIO controller The controller's registers are organized as sets of eight 32-bit registers with each set controlling a bank of up to 32 pins. A single interrupt is shared for all of the banks handled by the controller. Required properties: - compatible: Must be "brcm,brcmstb-gpio" - reg: Define the base and range of the I/O address space containing the brcmstb GPIO controller registers - #gpio-cells: Should be <2>. The first cell is the pin number (within the controller's pin space), and the second is used for the following: bit[0]: polarity (0 for active-high, 1 for active-low) - gpio-controller: Specifies that the node is a GPIO controller. - brcm,gpio-bank-widths: Number of GPIO lines for each bank. Number of elements must correspond to number of banks suggested by the 'reg' property. Optional properties: - interrupts: The interrupt shared by all GPIO lines for this controller. - interrupt-parent: phandle of the parent interrupt controller - interrupts-extended: Alternate form of specifying interrupts and parents that allows for multiple parents. This takes precedence over 'interrupts' and 'interrupt-parent'. Wakeup-capable GPIO controllers often route their wakeup interrupt lines through a different interrupt controller than the primary interrupt line, making this property necessary. - #interrupt-cells: Should be <2>. The first cell is the GPIO number, the second should specify flags. The following subset of flags is supported: - bits[3:0] trigger type and level flags 1 = low-to-high edge triggered 2 = high-to-low edge triggered 4 = active high level-sensitive 8 = active low level-sensitive Valid combinations are 1, 2, 3, 4, 8. See also Documentation/devicetree/bindings/interrupt-controller/interrupts.txt - interrupt-controller: Marks the device node as an interrupt controller - wakeup-source: GPIOs for this controller can be used as a wakeup source Example: upg_gio: gpio@f040a700 { #gpio-cells = <2>; #interrupt-cells = <2>; compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio"; gpio-controller; interrupt-controller; reg = <0xf040a700 0x80>; interrupt-parent = <&irq0_intc>; interrupts = <0x6>; brcm,gpio-bank-widths = <32 32 32 24>; }; upg_gio_aon: gpio@f04172c0 { #gpio-cells = <2>; #interrupt-cells = <2>; compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio"; gpio-controller; interrupt-controller; reg = <0xf04172c0 0x40>; interrupt-parent = <&irq0_aon_intc>; interrupts = <0x6>; interrupts-extended = <&irq0_aon_intc 0x6>, <&aon_pm_l2_intc 0x5>; wakeup-source; brcm,gpio-bank-widths = <18 4>; };
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