FPGA-高斯滤波

这里我选择的模板

 

 

 

 

 

 实现步骤3步

1、每行做乘积

2、求和

3、右移4位

 

 

 

//高斯滤波
/* 模板
    [   1  2  1  ]
    [   2  4  2  ]  *  1/16  
    [   1  2  1  ]
*/
/*  3步
    1、求乘积
    2、求和
    3、右移4
*/
`timescale 1ns/1ns
module gaussian_fliter(
    clk,
    rst_n,
    matrixp11,matrixp12,matrixp13,
    matrixp21,matrixp22,matrixp23,
    matrixp31,matrixp32,matrixp33,
    gaussian_data
);

//********************** input and output ***********************//
    input            clk                     ;
    input            rst_n                 ;
    input    [7:0]    matrixp11            ;
    input    [7:0]    matrixp12            ;
    input    [7:0]    matrixp13            ;
    input    [7:0]    matrixp21            ;
    input    [7:0]    matrixp22            ;
    input    [7:0]    matrixp23            ;
    input    [7:0]    matrixp31            ;
    input    [7:0]    matrixp32            ;
    input    [7:0]    matrixp33            ;
    output reg    [7:0]   gaussian_data        ;
//********************** main code ******************************//
    //第一步求乘积
    reg [11:0] row1_mul;
    reg [11:0] row2_mul;
    reg [11:0] row3_mul;
    always@(posedge clk or negedge rst_n) begin
        if(!rst_n) begin
            row1_mul <= 'd0;
            row2_mul <= 'd0;
            row3_mul <= 'd0;
        end
        else begin
            row1_mul <= matrixp11 + (matrixp12 << 1) + matrixp13;
            row2_mul <= (matrixp21 << 1) + (matrixp22 << 2) + (matrixp23 <<1);
            row3_mul <= matrixp31 + (matrixp32 << 1) + matrixp33;
        end
    end
    //第二步求和
    reg [11:0] sum;
    always@(posedge clk or negedge rst_n) begin
        if(!rst_n) begin
            sum <= 'd0;
        end
        else begin
            sum <= row1_mul + row2_mul + row3_mul;
        end
    end
    //第三步移位
    always@(posedge clk or negedge rst_n) begin
        if(!rst_n) begin
            gaussian_data <= 'd0;
        end
        else begin
            gaussian_data <= sum[11:4];
        end
    end

endmodule

`timescale 1ns/1ns

module gaussian_fliter_top(
        //system 
    clk        ,         //像素时钟的同步，coms_clk , vga_clk
    rst_n    ,          //复位信号        
    //coms or vga
    pre_vs,          //前行同步                
    pre_hs,          //前场同步              
    pre_en,          //前数据有效        
    pre_img_Y,         //数据灰度图像        
    
    post_vs,          //输出行同步                
    post_hs,          //输出场同步              
    post_en,          //输出数据有效        
    post_img_Y          //输出数据灰度图像    

);


//**********************input and output ********************//
    //system 
    input            clk            ;         //像素时钟的同步，coms_clk , vga_clk
    input            rst_n        ;          //复位信号        
    //coms or vga
    input            pre_vs         ;          //前行同步                
    input            pre_hs         ;          //前场同步              
    input            pre_en         ;          //前数据有效        
    input    [7:0]    pre_img_Y    ;         //数据灰度图像        
        
    output             post_vs        ;          //输出行同步                
    output             post_hs        ;          //输出场同步              
    output             post_en        ;          //输出数据有效        
    output     [7:0]    post_img_Y    ;          //输出数据灰度图像        

//********************** main code **************************//
wire  [7:0]   matrixp11,matrixp12,matrixp13;
wire  [7:0]   matrixp21,matrixp22,matrixp23;
wire  [7:0]   matrixp31,matrixp32,matrixp33;
wire              matrix_vs        ;
wire              matrix_hs        ;
wire              matrix_en        ;

Generate_Matrix_3x3_8bit Generate_Matrix_3x3_8bit(
    //system 
    .clk                    (clk        ),         //像素时钟的同步，coms_clk , vga_clk
    .rst_n                    (rst_n        ),          //复位信号        
    //coms or vga
    .pre_vs                    (pre_vs        ),          //前行同步                
    .pre_hs                    (pre_hs        ),          //前场同步              
    .pre_en                    (pre_en        ),          //前数据有效        
    .pre_img_Y                (pre_img_Y    ),         //数据灰度图像        
    .matrixp11                (matrixp11    ),
    .matrixp12                (matrixp12    ),
    .matrixp13                (matrixp13    ),
    .matrixp21                (matrixp21    ),
    .matrixp22                (matrixp22    ),
    .matrixp23                (matrixp23    ),
    .matrixp31                (matrixp31    ),
    .matrixp32                (matrixp32    ),
    .matrixp33                (matrixp33    ),
    .matrix_vs                (matrix_vs    ),
    .matrix_hs                (matrix_hs    ),
    .matrix_en                (matrix_en    )
);
//消耗3个时钟
wire [7:0] gaussian_data;
gaussian_fliter gaussian_fliter(
    .clk                      (clk              ),
    .rst_n                    (rst_n            ),
    .matrixp11                (matrixp11        ),
    .matrixp12                (matrixp12        ),
    .matrixp13                (matrixp13        ),
    .matrixp21                (matrixp21        ),
    .matrixp22                (matrixp22        ),
    .matrixp23                (matrixp23        ),
    .matrixp31                (matrixp31        ),
    .matrixp32                (matrixp32        ),
    .matrixp33                (matrixp33        ),
    .gaussian_data            (gaussian_data    )
);

    //延迟3个时钟
    reg [2:0] matrix_vs_r;
    reg [2:0] matrix_hs_r;
    reg [2:0] matrix_en_r;
    always@(posedge clk or negedge rst_n) begin
        if(!rst_n) begin
            matrix_vs_r <= 3'd0 ; 
            matrix_hs_r <= 3'd0 ;
            matrix_en_r <= 3'd0 ;
        end
        else begin
            matrix_vs_r <= {matrix_vs_r[1:0],matrix_vs};
            matrix_hs_r <= {matrix_hs_r[1:0],matrix_hs};
            matrix_en_r <= {matrix_en_r[1:0],matrix_en};
        end
    end
    
    assign     post_vs =  matrix_vs_r[2];     
    assign     post_hs =  matrix_hs_r[2]; 
    assign     post_en =  matrix_en_r[2]; 
    assign     post_img_Y = post_en ? gaussian_data:8'd0;
    
    
endmodule

`timescale 1ns/1ns
module gaussian_fliter_top_tb;

    //system 
    reg                clk                ;          //像素时钟的同步，coms_clk , vga_clk
    reg                rst_n            ;          //复位信号        
    //coms or vga                
    reg                pre_vs            ;       //前行同步
    reg                pre_hs            ;       //前场同步  
    reg                pre_en            ;       //前数据有效
    reg        [7:0]    pre_img_Y        ;         //数据灰度图像
    
    wire            post_vs            ;       //输出行同步
    wire            post_hs            ;       //输出场同步  
    wire            post_en            ;       //输出数据有效
    wire    [7:0]    post_img_Y        ;         //输出数据灰度图像

    initial clk = 1;
    always #5 clk = ~clk;
    
    initial begin
        rst_n = 0;
        pre_vs =0 ;
        pre_hs = 0;
        pre_en = 0;
        pre_img_Y = 0;
        #51;
        rst_n = 1;
        pre_vs = 1;
        #20;
        pre_hs = 1;
        #20;
        pre_en = 1;
        #60;
        pre_en = 0;
        #20;
        pre_hs = 0;
        #20;
        pre_hs = 1;
        #20;
        pre_en = 1;
        #60;
        pre_en = 0;
        #20;
        pre_hs = 0;
        #20;
        pre_hs = 1;
        #20;
        pre_en = 1;
        #60;
        pre_en = 0;
        #20;
        pre_hs = 0;
        #20;
        pre_hs = 1;
        #20;
        pre_en = 1;
        #60;
        pre_en = 0;
        #20;
        pre_hs = 0;
        #20;
        pre_hs = 1;
        #20;
        pre_en = 1;
        #60;
        pre_en = 0;
        #20;
        pre_hs = 0;
        $stop;
    end
    
    reg [7:0] shiftin;
    always@(posedge clk or negedge rst_n ) begin
        if(!rst_n)
            shiftin <= 'd1;
        else if(pre_en) 
            shiftin <= shiftin + 1'b1;
        else
            shiftin <= shiftin;
    end

gaussian_fliter_top gaussian_fliter_top(
    //system 
    .clk                (clk        ),          //像素时钟的同步，coms_clk , vga_clk
    .rst_n                (rst_n        ),          //复位信号        
    //coms or vga                    
    .pre_vs                (pre_vs        ),       //前行同步
    .pre_hs                (pre_hs        ),       //前场同步  
    .pre_en                (pre_en        ),       //前数据有效
    .pre_img_Y            (shiftin    ),         //数据灰度图像
    //output                                
    .post_vs            (post_vs    ),       //输出行同步
    .post_hs            (post_hs    ),       //输出场同步  
    .post_en            (post_en    ),       //输出数据有效
    .post_img_Y            (post_img_Y    )     //输出数据灰度图像

);


endmodule