`timescale 1ns/1ns
module Median_Filter_top(
//system
clk , //像素时钟的同步，coms_clk , vga_clk
rst_n , //复位信号
//coms or vga
pre_vs , //前行同步
pre_hs , //前场同步
pre_en , //前数据有效
pre_img_Y , //数据灰度图像
//output
post_vs , //输出行同步
post_hs , //输出场同步
post_en , //输出数据有效
post_img_Y //输出数据灰度图像
);
//************************* input and output ***************************//
//system
input clk ; //像素时钟的同步，coms_clk , vga_clk
input rst_n ; //复位信号
//coms or vga
input pre_vs ; //前行同步
input pre_hs ; //前场同步
input pre_en ; //前数据有效
input [7:0] pre_img_Y ; //数据灰度图像
output post_vs ; //输出行同步
output post_hs ; //输出场同步
output post_en ; //输出数据有效
output [7:0] post_img_Y ; //输出数据灰度图像
//************************* main code ********************************//
wire [7:0] matrixp11,matrixp12,matrixp13;
wire [7:0] matrixp21,matrixp22,matrixp23;
wire [7:0] matrixp31,matrixp32,matrixp33;
wire matrix_vs ;
wire matrix_hs ;
wire matrix_en ;
Generate_Matrix_3x3_8bit Generate_Matrix_3x3_8bit(
//system
.clk (clk ), //像素时钟的同步，coms_clk , vga_clk
.rst_n (rst_n ), //复位信号
//coms or vga
.pre_vs (pre_vs ), //前行同步
.pre_hs (pre_hs ), //前场同步
.pre_en (pre_en ), //前数据有效
.pre_img_Y (pre_img_Y ), //数据灰度图像
.matrixp11 (matrixp11 ),
.matrixp12 (matrixp12 ),
.matrixp13 (matrixp13 ),
.matrixp21 (matrixp21 ),
.matrixp22 (matrixp22 ),
.matrixp23 (matrixp23 ),
.matrixp31 (matrixp31 ),
.matrixp32 (matrixp32 ),
.matrixp33 (matrixp33 ),
.matrix_vs (matrix_vs ),
.matrix_hs (matrix_hs ),
.matrix_en (matrix_en )
);
wire [7:0] median_data;
Median_Filter_3X3 Median_Filter_3X3(
//system
.clk (clk ), //像素时钟的同步，coms_clk , vga_clk
.rst_n (rst_n ), //复位信号
//coms or vga
.matrixp11 (matrixp11 ),
.matrixp12 (matrixp12 ),
.matrixp13 (matrixp13 ),
.matrixp21 (matrixp21 ),
.matrixp22 (matrixp22 ),
.matrixp23 (matrixp23 ),
.matrixp31 (matrixp31 ),
.matrixp32 (matrixp32 ),
.matrixp33 (matrixp33 ),
.median_data (median_data )
);
//行-列-行 3个时钟的延迟
reg [2:0] matrix_vs_r;
reg [2:0] matrix_hs_r;
reg [2:0] matrix_en_r;
always@(posedge clk or negedge rst_n) begin
if(!rst_n) begin
matrix_vs_r <= 'd0;
matrix_hs_r <= 'd0;
matrix_en_r <= 'd0;
end
else begin
matrix_vs_r <= {matrix_vs_r[1:0],matrix_vs};
matrix_hs_r <= {matrix_hs_r[1:0],matrix_hs};
matrix_en_r <= {matrix_en_r[1:0],matrix_en};
end
end
assign post_vs = matrix_vs_r[2] ;
assign post_hs = matrix_hs_r[2] ;
assign post_en = matrix_en_r[2] ;
assign post_img_Y = (post_en) ? median_data:8'd0;
endmodule
1 `timescale 1ns/1ns
2 module Median_Filter_top_tb;
3
4
5
6
7 //system
8 reg clk ; //像素时钟的同步，coms_clk , vga_clk
9 reg rst_n ; //复位信号
10 //coms or vga
11 reg pre_vs ; //前行同步
12 reg pre_hs ; //前场同步
13 reg pre_en ; //前数据有效
14 reg [7:0] pre_img_Y ; //数据灰度图像
15
16 wire post_vs ; //输出行同步
17 wire post_hs ; //输出场同步
18 wire post_en ; //输出数据有效
19 wire [7:0] post_img_Y ; //输出数据灰度图像
20
21 initial clk = 1;
22 always #5 clk = ~clk;
23
24 initial begin
25 rst_n = 0;
26 pre_vs =0 ;
27 pre_hs = 0;
28 pre_en = 0;
29 pre_img_Y = 0;
30 #51;
31 rst_n = 1;
32 pre_vs = 1;
33 #20;
34 pre_hs = 1;
35 #20;
36 pre_en = 1;
37 #60;
38 pre_en = 0;
39 #20;
40 pre_hs = 0;
41 #20;
42 pre_hs = 1;
43 #20;
44 pre_en = 1;
45 #60;
46 pre_en = 0;
47 #20;
48 pre_hs = 0;
49 #20;
50 pre_hs = 1;
51 #20;
52 pre_en = 1;
53 #60;
54 pre_en = 0;
55 #20;
56 pre_hs = 0;
57 #20;
58 pre_hs = 1;
59 #20;
60 pre_en = 1;
61 #60;
62 pre_en = 0;
63 #20;
64 pre_hs = 0;
65 #20;
66 pre_hs = 1;
67 #20;
68 pre_en = 1;
69 #60;
70 pre_en = 0;
71 #20;
72 pre_hs = 0;
73 $stop;
74 end
75
76 reg [7:0] shiftin;
77 always@(posedge clk or negedge rst_n ) begin
78 if(!rst_n)
79 shiftin <= 'd1;
80 else if(pre_en)
81 shiftin <= shiftin + 1'b1;
82 else
83 shiftin <= shiftin;
84 end
85
86
87 Median_Filter_top Median_Filter_top(
88 //system
89 .clk (clk ), //像素时钟的同步，coms_clk , vga_clk
90 .rst_n (rst_n ), //复位信号
91 //coms or vga
92 .pre_vs (pre_vs ), //前行同步
93 .pre_hs (pre_hs ), //前场同步
94 .pre_en (pre_en ), //前数据有效
95 .pre_img_Y (shiftin ), //数据灰度图像
96 //output
97 .post_vs (post_vs ), //输出行同步
98 .post_hs (post_hs ), //输出场同步
99 .post_en (post_en ), //输出数据有效
100 .post_img_Y (post_img_Y ) //输出数据灰度图像
101
102 );
103
104
105
106
107 endmodule
