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SystemC & TLM-2.0 - Using OVM within SystemC for Verification

OVM-ML

System Verilog is the native language for in the end. however Caitlin's have donated OVM-ML to the only own community where ML stands for mixed language. you can wrap a source code of OVM-ML from the 0 vmworld bottle website where it's available learn to be Apache open source license. the idea of OVM-ML is to support mixed language OVM environments where you have a native System Verilog Verification environment and from that environment make use of individual verification components written in System Verilog in System C or any.

inter-Language Communication

communication in OVM-ML is handled by using the Oscar TLM one standard which has to be the communication standard that's used within OVM itself. so it can pass transactions between System Verilog、System C and E using TLM one method calls within the OVM-ML framework.

OVM Environment

a System Verilog Verification environment would typically make use of reusable verification components such as sequences drivers monitors checkers and school boards that may all be written in the native System Verilog Language. on the other hand you may sometimes want to reuse verification components written in other language such as EV sees or system see reference models and that's just what OVM allows you to do so let's have a look at an example of OVM-SC in particular.

OVM SC Example

this example is based exclusively on standards and open source code so we start by including including the standard System C header then the standard standard System C header then the standard TLM header because this example makes use of the ASTI standard TLM library. then finally we include the OVM-ML header which perhaps you could argue it's not strictly speaking a standard is nonetheless publicly available under an open source license.

Mix-and-match Libraries

so I'll start by emphasizing the mix-and-match nature of this example the example is written in system see our producer is a System C module within that System C module we're making use of features from the only MSC library that is features imported from OVM and also making direct use of the ASTI TLM to not standard. so this complete example will run using the oscars open-source simulator and using standard open-source libraries because if you want to make use serve System Verilog and then you'll need an appropriate tool and license from your ed a vendor but in this particular example we're successfully running over the MSC code simply using open source libraries.

OVM_component

so let's dive down into the detail we'll start off by having a look at the producer the producer is derived from the class OVM component which is a class from the OVM-ML library an OVM component is in derived from SC module so this component is just assistance in module in disguise. the component declares tlm_utils_simple_initiator_socket. so this is standard codes from the OSKI TLM library that will allow this component to communicate with other components using the TLM to standard. then comes the constructor and a macro OVM component utils which has some machinery to this OVM and component that will later be used when we register this component with the factory. only in component utils just mirrors the macrobes the same name from the OVM library itself. then comes end of elaboration is kink of interesting because it's a callback that's common between the system. see standard and the OVM standard both of those standards use the same name for this call backwards executed end of elaboration. call back is making a call to get_config_int and get_config_int arrogance interrogate the OVM configuration table which is a table of configuration parameters that could be set from the top down within the verification environment.

then comes the run method so run is a standard call back within OVM and it represents behavior is executed during simulation. the System C equivalent of this with just the socket thread process the run method is making a call to b_transport. and this is a standard TLM to naught interface method call so again we're mixing and matching standard calls using the TLM to naught library using System C and using OVM seal within the same example. then comes a call to OVM stop request this is another OVM feature. you may remember that systems see as a call SC stop which stop simulation either immediately or at the end of the delta cycle obion stop request does a little better than that by delaying the end of simulation until every component hasn't had a chance to run we possibly drain out any transaction buffers then comes report. report is another standard OVM call back you may remember that there are actually three callbacks you know the end that are executed at the end of simulation extract check and report so that gives you a little more fine-grained control and you can have using System C which just has a single end of simulation call back. in following the component we have the OVM_COMPONENT_REGISTER macro which actually registers this component with the OVM factory automation.

Env

now let's have a look at the top level component within the OVM component hierarchy which is another system. the module so this top-level component is going to instantiate the producer of the consumer and it dose so using the build method so within system see the module hierarchy gets instantiated by pooling with just a constructor of a system module form the constructor of a higher level system seen module in OVM the same thing is accomplished using the standard build call back and you know OVM lower level components are typically instantiated not by calling their constructors directly but by using the so called factory pattern this is a standard coding style with in object-oriented programming. it gives you a little bit more flexibility when instantiating objects because we can actually override the type of component being created by this factory method called create_component on the fly. so the idea is that you can write a fixed verification environment and then on the fly what if I the types of the components being created from the test. so in this case we create a producer and consumer component by calling the factory method and then bind together their sockets by calling the standard bind method of the TLM to library so the bind method being called on this slide is just straight out of the TLM to standard.

posted on 2024-06-06 22:01  松—松  阅读(4)  评论(0编辑  收藏  举报

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