Title

SystemVerilog -- 10.1 SystemVerilog Covergroup and Coverpoint

SystemVerilog Covergroup and Coverpoint

coverpoint 是 covergroup 中最基本的单元,多个 coverpoint 的覆盖率构成 covergroup 的覆盖率,在构成整体功能覆盖率。covergroup new

covergroup可以在包、模块、程序、接口类中定义,通常封装以下信息:

  • A set of coverage points
  • Cross coverage between coverage points
  • An event that defines when the covergroup is sampled
  • Other options to configure coverage object

covergroup

module tb;
// Declare some varibles that can be "sampled" in the covergroup
bit [1:0] mode;
bit [2:0] cfg;

// Declare a clock to act as an event that can be used to sample coverage points within the covergroup
bit clk;
always #20 clk = ~clk;

// "cg" is a covergroup that is sampled at every posedge clk
covergroup cg @ (posedge clk);
  coverpoint mode;
endgroup

// Create an instance of the covergroup
cg cg_inst;

initial begin
  // Instantiate the covergroup object similar to a class object
  cg_inst = new ();
  // Stimulus : Simply assign random values to the coverage variables
  // So that different values can be sampled by the covergroup object
  for (int i = 0; i < 5; i++) begin
    @(negedge clk);
    mode = $random;
    cfg  = $random;
    $display ("[%0t] mode=0x%0h cfg=0x%0h", $time, mode, cfg);
  end
end

// At the end of 500ns, terminate test and print collected coverage
// get_inst_coverage() 返回 covergroup 实例覆盖率
initial begin
  #500 $display ("Coverage = %0.2f %%", cg_inst.get_inst_coverage());
  $finish;
end 
endmodule

模拟日志

ncsim> run
  [40] mode=0x0  cfg=0x1
  [80] mode=0x1  cfg=0x3
  [120] mode=0x1  cfg=0x5
  [160] mode=0x1  cfg=0x2
  [200] mode=0x1  cfg=0x5
  Coverage = 50.00 %
Simulation complete via $finish(1) at time 500 NS + 0

coverpoint

module tb;
  bit [1:0] mode;
  bit [2:0] cfg;

  bit clk;
  always #20 clk = ~clk;

  // "cg" is a covergroup that is sampled at every posedge clk
  // This covergroup has two coverage points, one to cover "mode" and the other to cover "cfg". Mode can take any value from 0 -> 3 and cfg can take any value from 0 -> 7
  covergroup cg @(posedge clk);

  // Coverpoints can optionally have a name before a colon ":"
  cp_mode    : coverpoint mode;
  cp_cfg_10  : coverpoint cfg[1:0];
  cp_cfg_1sb : coverpoint cfg[0];
  cp_sum     : coverpoint (mode + cfg);
  endgroup

  cg   cg_inst;

  initial begin
    @(negedge clk);
    mode = $random;
    cfg  = $random;
    $display ("[%0t] mode=0x%0h cfg=0x%0h", $time, mode, cfg);
  end

  initial begin
    #500 $display ("Coverage = %0.2f %%", cg_inst.get_inst_coverage());
    $finish;
  end 
endmodule

模拟日志

ncsim> run
  [40] mode=0x0  cfg=0x1
  [80] mode=0x1  cfg=0x3
  [120] mode=0x1  cfg=0x5
  [160] mode=0x1  cfg=0x2
  [200] mode=0x1  cfg=0x5
  Coverage = 78.12 %
Simulation complete via $finish(1) at time 500 NS + 0

posted on 2024-05-11 23:25  松—松  阅读(60)  评论(0编辑  收藏  举报

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