边沿检测

边沿检测电路设计<转自http://oomusou.cnblogs.com/>

 

Method 1：
使用兩個reg

1 /* 
4 Filename    : posedge_detection.v
5 Compiler    : Quartus II 7.2 SP3
6 Description : Demo how to design posedge detection circuit
7 Release     : 07/06/2008 1.0
8 */
9 
10 module posedge_detection (
11   input  clk,
12   input  rst_n,
13   input  i_data_in,
14   output o_rising_edge
15 );
16 
17 reg r_data_in0;
18 reg r_data_in1;
19 
20 assign o_rising_edge = ~r_data_in0 & r_data_in1;
21 assign o_falling_edge = r_data_in0 & ~r_data_in1;

22 always@(posedge clk, negedge rst_n) begin
23   if (!rst_n) begin
24     r_data_in0 <= 0;
25     r_data_in1 <= 0;
26   end
27   else begin
28     r_data_in0 <= r_data_in1;
29     r_data_in1 <= i_data_in;
30   end
31 end
32 
33 endmodule

Method 2：
使用1個reg

1 /* 
4 Filename    : posedge_detection2.v
5 Compiler    : Quartus II 7.2 SP3
6 Description : Demo how to design posedge detection circuit
7 Release     : 08/11/2008 1.0
8 */
9 
10 module posedge_detection2 (
11   input      clk,
12   input      rst_n,
13   input      i_data_in,
14   output reg o_rising_edge
15 );
16 
17 reg r_data_in0;
18 
19 always@(posedge clk, negedge rst_n) begin
20   if (!rst_n)
21     r_data_in0 <= 0;
22   else begin
23     r_data_in0 <= i_data_in;
24    
25     if ({r_data_in0, i_data_in} == 2'b01)
26       o_rising_edge <= 1;   
27     else
28       o_rising_edge <= 0;

       if ({r_data_in0, i_data_in} == 2'b10)

         o_falling_edge <= 1;
      else
        o_falling_edge <= 0;

29   end
30 end
31 
32 endmodule