摘要: Every cell has multipletiming arcs. For example, a combinational logic cell, such as and, or, nand, nor, adder cell, has timing arcs from each input to each output of the cell. Sequential cells such as flip-flops have timing arcs from the clock to the outputs and timing constraints for the data pins 阅读全文
posted @ 2013-12-20 19:24 Nero_Backend 阅读(1418) 评论(0) 推荐(0) 编辑