Programming internal SRAM over SWD
https://github.com/MarkDing/swd_programing_sram
// // Copyright (c) 2013 SILICON LABORATORIES, INC. // // FILE NAME : 32bit_prog_defs.h // DESCRIPTION : ARM Serial Wire debug interface header file // #ifndef _32BIT_PROG_DEFS_ #define _32BIT_PROG_DEFS_ #include <compiler_defs.h> #include <C8051F380_defs.h> //----------------------------------------------------------------------------- // Project Constants //----------------------------------------------------------------------------- // System clock frequency in Hz #define SYSCLK 48000000 #define BOOL bit #define TRUE (1 == 1) #define FALSE (!TRUE) // Delay Times #define DELAY100mS -( SYSCLK / 48 * 0.1 ) #define DELAY20mS -( SYSCLK / 48 * 0.02 ) #define DELAY5mS -( SYSCLK / 48 * 0.005 ) #define DELAY1mS -( SYSCLK / 48 * 0.001 ) #define DELAY100uS -( SYSCLK / 48 * 0.000100 ) #define DELAY75uS -( SYSCLK / 48 * 0.000075 ) #define DELAY25uS -( SYSCLK / 48 * 0.000025 ) #define DELAY10uS -( SYSCLK / 48 * 0.00001 ) #define DELAY4_3uS -( SYSCLK / 48 * 0.0000043 ) #define DELAY3uS -( SYSCLK / 48 * 0.000003 ) #define DELAY2uS -( SYSCLK / 48 * 0.000002 ) // Timeout Times #define TIMEOUT_2Sec -( SYSCLK / 48 * 2 ) // Command Status Response Codes #define HOST_COMMAND_OK 0x55 #define HOST_INVALID_COMMAND 0x80 #define HOST_COMMAND_FAILED 0x81 #define HOST_AP_TIMEOUT 0x82 #define HOST_WIRE_ERROR 0x83 #define HOST_ACK_FAULT 0x84 #define HOST_DP_NOT_CONNECTED 0x85 // Property SRST values #define SRST_ASSERTED 0x1 #define SRST_DEASSERTED 0x0 #define DAP_RETRY_COUNT 255 //----------------------------------------------------------------------------- // ARM Debug Interface Constants //----------------------------------------------------------------------------- // ARM CoreSight SWD-DP packet request values #define SW_IDCODE_RD 0xA5 #define SW_ABORT_WR 0x81 #define SW_CTRLSTAT_RD 0x8D #define SW_CTRLSTAT_WR 0xA9 #define SW_RESEND_RD 0x95 #define SW_SELECT_WR 0xB1 #define SW_RDBUFF_RD 0xBD // ARM CoreSight SW-DP packet request masks #define SW_REQ_PARK_START 0x81 #define SW_REQ_PARITY 0x20 #define SW_REQ_A32 0x18 #define SW_REQ_RnW 0x04 #define SW_REQ_APnDP 0x02 // ARM CoreSight SW-DP packet acknowledge values #define SW_ACK_OK 0x1 #define SW_ACK_WAIT 0x2 #define SW_ACK_FAULT 0x4 #define SW_ACK_PARITY_ERR 0x8 // ARM CoreSight DAP command values #define DAP_IDCODE_RD 0x02 #define DAP_ABORT_WR 0x00 #define DAP_CTRLSTAT_RD 0x06 #define DAP_CTRLSTAT_WR 0x04 #define DAP_SELECT_WR 0x08 #define DAP_RDBUFF_RD 0x0E // ARM CoreSight DAP command masks #define DAP_CMD_PACKED 0x80 #define DAP_CMD_A32 0x0C #define DAP_CMD_RnW 0x02 #define DAP_CMD_APnDP 0x01 #define DAP_CMD_MASK 0x0F //----------------------------------------------------------------------------- // Global Variables //----------------------------------------------------------------------------- // These pin assignments match the debug adapter cable // // Pin 1: VREF P1.0 // Pin 2: SWDIO/TMS P1.1 // Pin 3: ground P1.2 // Pin 4: SWCLK/TCK P1.3 // Pin 5: ground P1.4 // Pin 6: SWO/TDO P1.5 // Pin 7: NC P1.6 // Pin 8: TDI P1.7 // Pin 9: ground GND // Pin 10: RESETB P2.1 // LED Pin Definitions SBIT(LED0, SFR_P2, 2); // Green LED SBIT(LED1, SFR_P2, 3); // Green LED // JTAG Pin Definitions SBIT(TDO_In, SFR_P1, 5); // TDO Input SBIT(TDI_Out, SFR_P1, 7); // TDI Output SBIT(TMS_Out, SFR_P1, 1); // TMS Output SBIT(TCK_Out, SFR_P1, 3); // TCK Output // Serial Wire Pin Definitions SBIT(SWDIO_Out, SFR_P1, 1); // SWDIO Output SBIT(SWDIO_In, SFR_P1, 1); // SWDIO Input SBIT(SWCLK_Out, SFR_P1, 3); // SWCLK Output // SWO on P0.5 with TDO // Reset Pin Definitions SBIT(nSRST_Out, SFR_P0, 1); // nSRST Output SBIT(nSRST_In, SFR_P0, 1); // nSRST Input // These pins are ground on the CoreSight debug connector SBIT(P1_2, SFR_P1, 2); SBIT(P1_4, SFR_P1, 4); //----------------------------------------------------------------------------- // Macros //----------------------------------------------------------------------------- // Serial Wire Interface Macros #define _SetSWPinsIdle { P1MDOUT |= 0x08; P1MDOUT &= ~0x22; P1 |= 0x2A; } #define _SetSWDIOasInput { P1MDOUT &= ~0x02; P1 |= 0x02; } #define _SetSWDIOasOutput P1MDOUT |= 0x02 // Set all debug pins xPIN_OUT to 1 (open drain outputs off) #define _ResetDebugPins { P1MDOUT &= ~0x8A; P1 |= 0x8A; P0MDOUT &= ~0x02; P0 |= 0x02; } // Target Reset Control Macros #define _AssertTargetReset nSRST_Out = 0 #define _ReleaseTargetReset nSRST_Out = 1 #define _IsTargetReset (nSRST_In == 1) //----------------------------------------------------------------------------- // Function Prototypes //----------------------------------------------------------------------------- typedef unsigned char STATUS; //----------------------------------------------------------------------------- // SWD-DP Interface Functions //----------------------------------------------------------------------------- void SWD_Initialize (void); STATUS SWD_Configure (U8 dp_type); STATUS SWD_Connect (void); STATUS SWD_Disconnect (void); STATUS SWD_LineReset (void); STATUS SWD_ClearErrors (void); STATUS SWD_DAP_Move(U8, U8, U32 *); STATUS SW_Response (U8); void SW_DAP_Read(U8, U8, U32 *); void SW_DAP_Write(U8, U8, U32 *, BOOL); U8 SW_Request(U8); BOOL SW_CalcDataParity(void); U8 SW_ShiftPacket(U8, U8); void SW_ShiftByteOut(U8); U8 SW_ShiftByteIn(void); void SW_ShiftReset(void); #endif // _32BIT_PROG_DEFS
U32 code binraw0[ ] = { 0x20008000, 0x2000016f, 0x20000185, 0x20000187, 0x20000189, 0x20000189, 0x20000189, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000189, 0x20000189, 0x00000000, 0x20000189, 0x20000041, 0x13f8f240, 0x300f2c2, 0x1c426818, 0x4770601a, 0x7f0e92d, 0xf2c42500, 0xf04f0503, 0xf8c50aa5, 0xf44fa030, 0xf24a4950, 0xf44f1240, 0xf24a4420, 0xf04f13e0, 0xf8c50add, 0xf2c4a030, 0xf2c40302, 0xf44f0202, 0xf04f7040, 0xf04f4c00, 0xf2c40808, 0xf44f0402, 0x26036740, 0x902f2c4, 0x11f4f240, 0xf8c92502, 0xf2c25024, 0xf8c20100, 0xf8c28044, 0xf8c48024, 0xf8c4c044, 0x6498c034, 0x62586058, 0x625f645f, 0x62566456, 0xf644680a, 0xf2c15cd3, 0xfbac0c62, 0xf24e2102, 0x9880310, 0x300f2ce, 0xf44f3801, 0x6058426d, 0x200f2ce, 0x200021f0, 0x1023f882, 0x20076098, 0xf8826018, 0xe8bd1023, 0x477007f0, 0xf24ab410, 0xf24a1040, 0x4a0c14e0, 0x402f2c4, 0x2f2c4, 0xf5016811, 0x6813717a, 0xd8fc4299, 0x43cb6821, 0xf041b299, 0x60e36340, 0x43cb6801, 0xfc83fa1f, 0x3140f44c, 0xe7eb60c1, 0x200001f8, 0x49112000, 0xf8504a11, 0xf8413b04, 0x42913b04, 0x2000dbf9, 0xf8414a0e, 0x42910b04, 0x480ddbfb, 0x60014909, 0x5e00f04e, 0xf0004770, 0xf7fff817, 0x4809ffc7, 0x60084907, 0x468d6801, 0x47006840, 0xe7fee7fe, 0xe7fe, 0x20000000, 0x200001f8, 0x200001fc, 0xe000ed08, 0x1000, 0x360f24d, 0x302f2c4, 0x7d0691a, 0x6918d51f, 0xd41c0781, 0xf013691b, 0xd1180204, 0xc10f24e, 0xc00f2ce, 0x120f44f, 0x1004f8cc, 0x2008f8cc, 0x46612205, 0x2000f8cc, 0xf24e6808, 0x3c20310, 0x300f2ce, 0x2200d5f8, 0x605a601a, 0xf7ff609a, 0xbf00bf2f, 0x1312d00, }; U32 code binraw[ ] = { 0x20008000, 0x20000151, 0x20000d8d, 0x20000d91, 0x20000d95, 0x20000d99, 0x20000d9d, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000141, 0x20000145, 0x00000000, 0x20000149, 0x20000d7d, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000e91, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000cbd, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x20000219, 0x200018d0, 0x200018d0, 0x18, 0x200018e8, 0x1c8, 0xbf00e7fe, 0xbf00e7fe, 0xbf00e7fe, 0xbf00e7fe, 0xbf00e7fe, 0xbf00e7fe, 0xbf00e7fe, 0xbf00e7fe, 0xbf00e7fe, 0x4a164b15, 0x4293b570, 0x330cd202, 0xd3fc4293, 0x42ab4d13, 0x2100d21b, 0x42abe001, 0x6858d217, 0x3308681c, 0xd0f82800, 0x1e462204, 0x51094290, 0x680f3c6, 0xb11ed9f1, 0x42902208, 0xd9ec6061, 0x51111d16, 0x42903208, 0xd9e65131, 0xf000e7f8, 0xf000fd63, 0xe7fefedd, 0x20000118, 0x20000124, 0x2000012c, 0xb1aab430, 0x1e536804, 0xf3c3600c, 0x23040480, 0xd90d429a, 0x6844b124, 0x429a2308, 0xd907604c, 0x1d1c581d, 0x5825505d, 0x429a3308, 0xd8f75065, 0x4770bc30, 0xb191b410, 0xf3c31e4b, 0x23040280, 0x42992400, 0xd90a5024, 0x2308b11a, 0x60444299, 0x1d1ad905, 0x3308501c, 0x50144299, 0xbc10d8f9, 0xbf004770, 0xbf00e7fe, 0x4ff0e92d, 0xb0834d2d, 0x3bfff04f, 0x591ff248, 0x16e0f24a, 0x80acf8df, 0xf8cd4f29, 0x2400b004, 0xfde2f000, 0xf00046aa, 0xf2c5fa15, 0xf00019eb, 0xf2c4fa8d, 0x46580602, 0x4283682b, 0xf8dad011, 0xfba93000, 0x21641003, 0xfb010942, 0xb1c03012, 0x3000f898, 0x201f083, 0xf04302d3, 0x60f06000, 0x5a16828, 0xb9130d8b, 0x6280f44f, 0x783a60b2, 0x40912101, 0xbf04428b, 0x6380f44f, 0x34016073, 0xf000e7da, 0xf898f823, 0xb1533000, 0x783a9901, 0xd006428a, 0x98019201, 0xfc20f000, 0x781b4b09, 0x9a01e7d8, 0xd0d53201, 0xd1d32b00, 0x31fff04f, 0x91012010, 0xfc12f000, 0xbf00e7ca, 0x20001960, 0x2000194d, 0x2000194c, 0xbf004770, 0xcfcf641, 0x5340f44f, 0x302f2c4, 0xf2c22200, 0xf8cc0c00, 0x651a2004, 0x20026d19, 0x11c7f362, 0x65192201, 0x605a6058, 0xbf004770, 0x00000000, 0x4ff0e92d, 0x280eb10, 0x4680b087, 0xf0009205, 0x4da780ce, 0x31fff102, 0x6bae6a28, 0x6bef6a6c, 0xebc71b82, 0xfb080904, 0x23ff9902, 0xf0019302, 0xf04f0a01, 0xf1b90b00, 0xf0400f00, 0x990580dd, 0x428c2401, 0x80b0f000, 0xf00f1ba, 0xfbb4d024, 0xfb08f6f8, 0xf1064916, 0xf106000f, 0xf8550709, 0xf855a020, 0xf1067027, 0xebca0208, 0x360e0307, 0x3c03fb09, 0x22f855, 0x6026f855, 0x108ebc9, 0x900ebc6, 0xc909fb01, 0xf0c045cb, 0x990580cd, 0x428c3401, 0x8088f000, 0xf2f8fbb4, 0x4a12fb08, 0x609f102, 0x70ff102, 0x6026f855, 0x7027f855, 0x8f102, 0x320e1bf3, 0x3c03fb0a, 0x20f855, 0x9022f855, 0x108ebca, 0xa00ebc9, 0xca0afb01, 0xd22f45d3, 0xf992f001, 0x100e9cd, 0x7080f509, 0xf98cf001, 0xe9d3a370, 0xf0012300, 0x4602f8cb, 0xe9dd460b, 0xf0010100, 0x2800f985, 0x4630d179, 0xf97cf001, 0x100e9cd, 0x7080f507, 0xf976f001, 0xe9d3a365, 0xf0012300, 0x4602f8b5, 0xe9dd460b, 0xf0010100, 0x9a02f96f, 0xbf182800, 0x92024622, 0x46d3bf18, 0xfbb43401, 0xfb08f2f8, 0xf1024a12, 0xf1020609, 0xf855070f, 0xf8556026, 0xf1027027, 0x1bf10008, 0xfb0a320e, 0xf8551301, 0xf8550020, 0xebca9022, 0xebc90108, 0xfb010c00, 0x45d33a0c, 0xf001d28d, 0xe9cdf943, 0xf5090100, 0xf0017080, 0xa349f93d, 0x2300e9d3, 0xf87cf001, 0x460b4602, 0x100e9dd, 0xf936f001, 0x9905b178, 0x34019402, 0x46d3428c, 0xaf78f47f, 0x2b7f9b02, 0x4841d954, 0x70022200, 0xe8bdb007, 0x46308ff0, 0xf91ef001, 0x100e9cd, 0x7080f507, 0xf918f001, 0xe9d3a336, 0xf0012300, 0x460bf857, 0xe9dd4602, 0xf0010100, 0x9b02f911, 0xbf182800, 0x93024623, 0x46d3bf18, 0x9402e74d, 0xe79d46d3, 0xf900f001, 0x102e9cd, 0x7080f506, 0xf8faf001, 0xe9d3a327, 0xf0012300, 0x4602f839, 0xe9dd460b, 0xf0010102, 0xb310f8f3, 0xb008f8cd, 0xe70a46cb, 0xf8e8f001, 0x100e9cd, 0x7080f506, 0xf8e2f001, 0xe9d3a31b, 0xf0012300, 0x4602f821, 0xe9dd460b, 0xf0010100, 0x2800f8db, 0x9402d034, 0xe71a46cb, 0x48174b16, 0x21019a02, 0x70027019, 0x4620e7a6, 0xf8c8f001, 0x102e9cd, 0x7080f507, 0xf8c2f001, 0xe9d3a30b, 0xf0012300, 0x460bf801, 0xe9dd4602, 0xf0010102, 0x2800f8bb, 0x23ffbf0c, 0x93022300, 0xf04fbf0c, 0x46cb0b00, 0xbf00e6cd, 0x8000f3af, 0x33333333, 0x3ff33333, 0x200018fc, 0x2000194c, 0x2000194d, 0xf0014638, 0x4606f89d, 0x7080f50a, 0xf001460f, 0xa30af897, 0x2300e9d3, 0xffd6f000, 0x4602460b, 0x46304639, 0xf890f001, 0x28009b02, 0x4623bf18, 0xbf189302, 0xe6cc46cb, 0x8000f3af, 0x33333333, 0x3ff33333, 0x4a14b430, 0x5340f44f, 0x302f2c4, 0x68518c1d, 0xf101b2ad, 0xf8420408, 0x20025024, 0x7400f04f, 0x609c2904, 0xd80e6098, 0xf8521ccc, 0x31014024, 0x651c6051, 0x22016d19, 0x11c7f36f, 0x60586519, 0xbc30605a, 0x6d1a4770, 0x12c7f36f, 0xbc30651a, 0xbe56f7ff, 0x200018fc, 0x4161f44f, 0x481db470, 0x100f2ce, 0xf8c12480, 0x24034084, 0xf44f6144, 0x24085240, 0x61842300, 0x24092601, 0xf2c42502, 0x61c40202, 0x60434601, 0x60c66083, 0x46146105, 0x65132006, 0xf36f6d13, 0x651313c7, 0x60566055, 0x7db6813, 0x60a5d4fc, 0xfa1f8c23, 0xf5acfc83, 0x638b7380, 0x38013104, 0x688bd001, 0xf44fe7e9, 0xf2ce4061, 0x22800000, 0x2184f8c0, 0xbc706042, 0xbf004770, 0x200018fc, 0xb4102200, 0x203f2c4, 0x631424a5, 0x4050f44f, 0x1340f24a, 0x631424dd, 0x302f2c4, 0xf2c42108, 0x22020002, 0x64596242, 0xbc106259, 0xbf004770, 0x3f4f641, 0x300f2c2, 0x601a2201, 0xbf004770, 0xbf004770, 0xbf004770, 0xf0f641, 0xcecf641, 0xf2c2, 0xf2c22203, 0xf44f0c00, 0x21014300, 0xf2c46002, 0xf8cc0301, 0x6d181000, 0x3280f440, 0x4770651a, 0xbf004770, 0x1f0f641, 0xcecf641, 0xf2c22001, 0xf2c20100, 0xf44f0c00, 0x60084300, 0x301f2c4, 0xf8cc, 0x200f8d3, 0x280f040, 0x2200f8c3, 0xbf004770, 0xbf282940, 0x7832140, 0xd073b4f0, 0xd06e2900, 0xf8134603, 0xf44f0b01, 0x1e4a4400, 0x401f2c4, 0xf03f013, 0x830f884, 0x1f002, 0x2a00d013, 0xb110d05d, 0x2a00e008, 0xf813d059, 0x3a01cb01, 0xf8840798, 0xd006c830, 0xcb01f813, 0x7983a01, 0xc830f884, 0x2a03d1ef, 0x1f16d929, 0x4635461c, 0x4700f44f, 0xb04f854, 0x701f2c4, 0xf8c72d03, 0xf3c60830, 0xd9130680, 0xf854b136, 0x3d040b04, 0xf8c72d03, 0xd90b0830, 0xf8564626, 0x3d080b04, 0x830f8c7, 0x1d346860, 0xf8c72d03, 0xd8f30830, 0xf0201f10, 0x30040003, 0x203f002, 0xb1f2181b, 0xf44f3a01, 0xf8134500, 0xf2c4cb01, 0x46140501, 0xc830f885, 0x201f002, 0xb12ab18c, 0xb01f813, 0xf8853c01, 0xd00a0830, 0xf812461a, 0xf885cb01, 0x7858c830, 0x3c021c53, 0x830f885, 0x4608d1f4, 0x4770bcf0, 0x460a4603, 0xbf00e7ad, 0x4c37b538, 0x1ec36820, 0xd8152b07, 0xf003e8df, 0x14141440, 0x4142115, 0x4c00f44f, 0xc01f2c4, 0x1810f8dc, 0x40f041, 0x810f8cc, 0x3810f8dc, 0x220f043, 0x2810f8cc, 0xf44fbd38, 0xf2c44e00, 0xf8de0e01, 0x25081810, 0x40f041, 0x810f8ce, 0x4d246025, 0x682a4b24, 0x429188d9, 0x4611bf28, 0xd9222940, 0x21404c21, 0xf7ff6820, 0x6823ff4b, 0x1819682a, 0x4e00f44f, 0x60281a10, 0xf2c46021, 0xf8de0e01, 0xf0411810, 0xf8ce0002, 0xbd380810, 0x4c00f44f, 0xc01f2c4, 0x3810f8dc, 0xf0432101, 0xf8cc0240, 0x60212810, 0x4b10bd38, 0xf7ff6818, 0xf44fff29, 0xf2c44c00, 0xf8dc0c01, 0x20012810, 0x108f042, 0x4e00f44f, 0x1810f8cc, 0xe01f2c4, 0xf8de6020, 0xf0411810, 0xf8ce0002, 0xbd380810, 0x200018ec, 0x200018e8, 0x20001958, 0x20001954, 0xf44fb508, 0xf2c44300, 0xf8d30301, 0x7502810, 0xf8d3d508, 0x210b0810, 0x82f36f, 0x810f8c3, 0x60194b19, 0xd50c06d1, 0x4c00f44f, 0xc01f2c4, 0x1810f8dc, 0xf0414b14, 0x21010080, 0x810f8cc, 0x7d26019, 0x4b10d51c, 0x2a0b681a, 0x681bd003, 0xd0052b01, 0x2001e7fe, 0x681b6018, 0xd1f92b01, 0x4e00f44f, 0xe01f2c4, 0x3830f8de, 0x49064a07, 0xf8de6013, 0x20023830, 0x60536008, 0xf898f000, 0x4008e8bd, 0xbf44f7ff, 0x200018ec, 0x20001958, 0x7804b4f0, 0xebb24603, 0xbf240fc4, 0xd27802, 0xd0640788, 0xd05f2a00, 0x4b01f811, 0xf0111e50, 0xf8830f03, 0xf0004030, 0xd0150401, 0xd0532800, 0xe009b114, 0xd04f2800, 0x4b01f811, 0xf0113801, 0xf8830f03, 0xd0074030, 0x4b01f811, 0xf0113801, 0xf8830f03, 0xd1ed4030, 0xd9212803, 0x460c1f06, 0xf8544635, 0x2d037b04, 0xf3c6631f, 0xd9100680, 0xf854b12e, 0x3d046b04, 0x631e2d03, 0x4626d909, 0x7b04f856, 0x631f3d08, 0x1d346867, 0x631f2d03, 0x1f04d8f5, 0x403f024, 0xf0003404, 0x19090003, 0x3801b1d0, 0x5b01f811, 0xf8834604, 0xf0005030, 0xb18c0001, 0xf811b128, 0x3c01cb01, 0xc030f883, 0x4608d00a, 0x5b01f810, 0x5030f883, 0x1c41784d, 0xf8833c02, 0xd1f45030, 0xbcf04610, 0x46104770, 0xbf00e7ba, 0x4b0cb538, 0xb1a2681a, 0x2a01681a, 0x4d0ad1fc, 0xf6484b08, 0x18290480, 0x401f2c4, 0x601d2502, 0xf7ff4620, 0x6921ff7b, 0x8af441, 0x325f040, 0xbd386123, 0x200018f4, 0x200018d0, 0xf2404a44, 0x88136181, 0xd074428b, 0xf5b3d90a, 0xd01e6f10, 0x3201f640, 0xd01a4293, 0x220a493e, 0x4770600a, 0x6fa0f5b3, 0xf5b3d058, 0xd1f56fd0, 0xf5b38853, 0xd0677f80, 0x7f00f5b3, 0x4a37d1ee, 0x60114937, 0x4b372222, 0x21074833, 0x6001601a, 0xf6484770, 0xf2c40080, 0x69010001, 0x324f242, 0x345f2c0, 0x203ea41, 0x69036102, 0x72dbf64b, 0x18af423, 0xc24f021, 0x38af44c, 0x120f043, 0x69036101, 0x72baf6cf, 0xc02ea03, 0x18af44c, 0x324f041, 0x69026103, 0xc8af422, 0x134f02c, 0x38af441, 0x224f043, 0x69016102, 0x4c00f44f, 0x38af441, 0x264f043, 0x61022108, 0xc01f2c4, 0xf8dc7001, 0x4a183050, 0x3000f443, 0xf8cc4b12, 0x21010050, 0x60112003, 0x47706018, 0xf44f8852, 0x4b0d4c00, 0x17ff002, 0xc01f2c4, 0xf8cc2003, 0x60181000, 0x88504770, 0x5f08f5b0, 0x4a0bd18e, 0x601a4b06, 0xe79e2217, 0x4b044809, 0x60182212, 0xbf00e799, 0x20001958, 0x200018ec, 0x20001954, 0x20001864, 0x200018e8, 0x200018f4, 0x2000189c, 0x20001888, 0x360f24d, 0x302f2c4, 0x7d0691a, 0x6918d51f, 0xd41c0781, 0xf013691b, 0xd1180204, 0xc10f24e, 0xc00f2ce, 0x120f44f, 0x1004f8cc, 0x2008f8cc, 0x46612205, 0x2000f8cc, 0xf24e6808, 0x3c20310, 0x300f2ce, 0x2200d5f8, 0x605a601a, 0xf7ff609a, 0xbf00bd1b, 0xf44fb508, 0xf2c45040, 0x68030002, 0xd40b019a, 0x5240f44f, 0x202f2c4, 0x14b6811, 0xbd08d400, 0x4008e8bd, 0xbb00f7ff, 0xfc98f7ff, 0xbf00e7f0, 0x4c50f44f, 0x5340f44f, 0xf2c4b470, 0xf44f0302, 0x26041100, 0xc02f2c4, 0x1024f8cc, 0x2630605e, 0xf44f609e, 0x609e4670, 0x605e2600, 0x250124c0, 0x631d2607, 0x4261f44f, 0x615d619e, 0x605c609c, 0x64e0f44f, 0xf2ce609c, 0x20800200, 0x6480f44f, 0xf8c2605c, 0x60500184, 0xbc706059, 0xbf004770, 0xf000b508, 0xf641f8c9, 0xf44f03e4, 0xf2c25234, 0xf2c00300, 0x601a1231, 0xbf00bd08, 0x4350f44f, 0xf2c42202, 0xf2c50302, 0x625a0220, 0xbf004770, 0x1360f641, 0x300f2c2, 0x1c426818, 0x4770601a, 0xbf00e7fe, 0xbf00e7fe, 0xbf00e7fe, 0xbf00e7fe, 0xbf00e7fe, 0xf641b430, 0xf2c205e4, 0x68290500, 0xfb002032, 0xf644fc01, 0xf2c152d3, 0xf64c0262, 0xfba2236b, 0xf6c65401, 0xfba3335f, 0x9a1250c, 0x310f24e, 0x300f2ce, 0xde81e4c, 0x4c6df44f, 0x605c2210, 0xc00f2ce, 0x204f2ce, 0x24f03801, 0x21072500, 0x4023f88c, 0x6019609d, 0xbc306010, 0xbf004770, 0xbf004770, 0xf7ffb508, 0xf000ffaf, 0xf641f815, 0xf44f03e4, 0xf2c25234, 0xf2c00300, 0x601a1231, 0xffbef7ff, 0xff92f7ff, 0xffbaf7ff, 0xff5ef7ff, 0x4008e8bd, 0xbfe4f7ff, 0x2a0f24a, 0xf2c4b4f0, 0x241e0202, 0x1340f24a, 0x4120f44f, 0x10e0f24a, 0xf2c46294, 0x60540302, 0x7cc0f44f, 0x27086314, 0x102f2c4, 0x4500f04f, 0x2f2c4, 0x6640f44f, 0x72c4f44f, 0xc028f8c3, 0xc004f8c3, 0x625f645f, 0x634d631a, 0x62466446, 0xbcf0644d, 0xbf004770, 0xf44fb538, 0xf2c44300, 0x6b1c0301, 0x631c6a1d, 0x621d07ea, 0x7abd41a, 0x720d415, 0x7a1d410, 0x762d40b, 0x7e3d406, 0xbd38d400, 0x4038e8bd, 0xbc50f7ff, 0xfc38f7ff, 0xf7ffe7f5, 0xe7f0fc33, 0xfc2ef7ff, 0xf7ffe7eb, 0xe7e6fc23, 0xfd52f7ff, 0xbf00e7e1, 0x4300f44f, 0x301f2c4, 0xf8c32280, 0xf8d32314, 0x22000300, 0x140f040, 0x1300f8c3, 0x621a631a, 0xf44f6c18, 0xf0404c61, 0x64190101, 0xf2ce6d18, 0xf0400c00, 0x65190104, 0x2200f8c3, 0x200f8d3, 0x120f040, 0x1200f8c3, 0x200f8d3, 0x140f040, 0x1200f8c3, 0xf0406e18, 0x66190180, 0xf3626e18, 0x66181045, 0x20046e19, 0x1186f362, 0xf8cc6619, 0x69190004, 0x1104f362, 0x47706119, 0xb5102000, 0x46024601, 0xf804f000, 0x4010e8bd, 0xb954f7ff, 0x2100b510, 0x72a0f44f, 0xf000481e, 0x20c0f86b, 0xf9a2f000, 0x21004c1c, 0x602022c0, 0xf862f000, 0x68224b18, 0x71a0f503, 0x3328625a, 0x428b3218, 0x2000d1fa, 0x4a134915, 0xf878f000, 0xf44f2100, 0xf44f5380, 0x480f6280, 0xf828f000, 0x49102001, 0xf0004a10, 0x2100f86b, 0x5380f44f, 0x6280f44f, 0xf000480c, 0x2002f81b, 0x4a0b4909, 0xf85ef000, 0x21004809, 0x6280f44f, 0x5380f44f, 0x4010e8bd, 0xb80cf000, 0x20001968, 0x20001964, 0x200018b4, 0x200018b6, 0x20001990, 0x200019b8, 0x68c4b570, 0xf03f014, 0xf5b2d017, 0xd0097f00, 0x6f80f5b2, 0xf5b2d003, 0xd10e7f80, 0x6a41e002, 0xe0032301, 0x1e5e4d07, 0xd80842ae, 0x61014322, 0x61c36001, 0x200060c2, 0x2001bd70, 0x2001bd70, 0xbf00bd70, 0xfffffe, 0xbb8cf000, 0xb51068c3, 0x320f023, 0x6a4360c3, 0x685b6982, 0x429a4604, 0xf000d00f, 0x68e3f84c, 0xf4236a62, 0xf0235340, 0xf0430310, 0x60e30310, 0x61a36853, 0x60936923, 0x68e36023, 0x4380f423, 0x340f023, 0xbd1060e3, 0x460eb570, 0x46104605, 0xf0004614, 0x7833f91f, 0xd0042b72, 0xd0092b77, 0xd1252b61, 0x2300e002, 0xe0052201, 0xf2482308, 0xe0010202, 0x22022304, 0x1f01f816, 0xd002292b, 0xd10a2962, 0xf042e004, 0xf0430203, 0xe7f30302, 0x204f042, 0x301f043, 0xf013e7ee, 0x60e20f08, 0xd0066165, 0x21004620, 0xf0002202, 0xe000f947, 0x46202400, 0xb538bd70, 0x46046801, 0x69056a43, 0x689b68c0, 0x2200f420, 0xf00060e2, 0x2a020282, 0xf410d117, 0xd0193080, 0xbf384299, 0x42a94619, 0x4628d005, 0x46221b49, 0xf812f000, 0x6a63b960, 0x609d2000, 0x602568e3, 0x3380f423, 0x60e360a0, 0xf04fbd38, 0xbd3830ff, 0x30fff04f, 0xbd38, 0x41f0e92d, 0x460668d7, 0x1f80f417, 0x4614460d, 0x8014f8d2, 0x4640d005, 0xfb16f000, 0x710f047, 0x4b1861a0, 0x303ea07, 0x4640b193, 0xf00069a1, 0x2800fb1d, 0x68e3da07, 0x30fff04f, 0x380f043, 0xe8bd60e3, 0xf42781f0, 0xf0273700, 0x60e70710, 0x4640462a, 0xf0004631, 0x69a3fb15, 0xbf1442a8, 0x30fff04f, 0x18ed2000, 0x4300f020, 0x61a51aed, 0x68e3b128, 0x30fff04f, 0x380f043, 0xe8bd60e3, 0xbf0081f0, 0x20010, 0xe92d4b32, 0x1cc541f0, 0x8ad681c, 0x28004698, 0x2700d05a, 0x6821e03f, 0x5f80f1b1, 0x68a6d139, 0xf1b36833, 0x68635f80, 0x6872d106, 0x3303189b, 0x68b36063, 0xe02e60a3, 0xd10642ab, 0xf04f4620, 0xf8405300, 0xe8bd3b0c, 0x1cea81f0, 0xd9104293, 0xf04f4620, 0xf8405200, 0x1b5b2b0c, 0x285eb00, 0x60653b03, 0xf84060a2, 0x60531025, 0xe8bd6096, 0xb97681f0, 0x1ac0009b, 0xfac6f000, 0x3ffff1b0, 0xf04fd01e, 0x60235300, 0xf1046065, 0xe8bd000c, 0x462781f0, 0x2c0068a4, 0x300cd1bd, 0xfab4f000, 0x3ffff1b0, 0xf04fd00f, 0x60035300, 0x60846045, 0xf8c8b917, 0xe0000000, 0x300c60b8, 0x81f0e8bd, 0xe8bd4630, 0x462081f0, 0x81f0e8bd, 0x20001aa8, 0x5380f04f, 0x3c0cf840, 0x4770, 0xf7ffb510, 0x4604ff8f, 0x4904b928, 0xf0002217, 0xf000fa87, 0x4620fa5b, 0xbf00bd10, 0x200018b8, 0x41f0e92d, 0xb08668c6, 0xf03f016, 0xf8d04604, 0x69078014, 0xd0276a45, 0xf08f016, 0xf000d117, 0x4640f829, 0xfa48f000, 0x6f00f416, 0x4638d002, 0xffd0f7ff, 0x5b60db6, 0x4fa5f116, 0xa801d107, 0x22146a21, 0xfa56f000, 0xf000a801, 0x2100f8dd, 0x6a602218, 0xfe8af7ff, 0x21004620, 0xf7ff2228, 0x6265fe85, 0xe0012000, 0x30fff04f, 0xe8bdb006, 0x81f0, 0x4604b570, 0xe8bdb118, 0xf0004070, 0x4605b8f4, 0x20284b07, 0x3004fb00, 0xf8edf000, 0x28003401, 0xf04fbf18, 0x2c0835ff, 0x4628d1f2, 0xbf00bd70, 0x20001968, 0x41f0e92d, 0x68c64b41, 0xea064604, 0x460d0303, 0xf8d04617, 0x2b008014, 0x4640d071, 0xfa04f000, 0xd16c2800, 0xd0042f01, 0xd0072f02, 0xd0272f00, 0x4620e065, 0xf86cf000, 0xe021182d, 0xf0004640, 0x2800f9ed, 0x68e3da06, 0xf0432001, 0x60e30380, 0x81f0e8bd, 0x69a16a62, 0x68936827, 0xbf2c429f, 0x18cb19cb, 0x1a5b6921, 0xf01168e1, 0xd0030f20, 0x42936852, 0x4613bfb8, 0xbfac4283, 0x182d18ed, 0xdb3f2d00, 0x5f00f416, 0x6a63d005, 0x68996822, 0xbf384291, 0x69a3609a, 0xdb0e429d, 0x68216a60, 0x42916882, 0x4611bf38, 0x18cf6922, 0x42bd1abf, 0x68c0dc03, 0x42bd18c7, 0x2300db07, 0x606360a3, 0xf0466a63, 0x605d0620, 0xf016e011, 0xebc30f02, 0xbf1c0505, 0x5ebc0, 0xf01660a0, 0xd0020f01, 0x19491a51, 0x19556061, 0xf0266025, 0xf4260620, 0xf4262602, 0x60e65682, 0xe8bd2000, 0x200281f0, 0x81f0e8bd, 0xe8bd2002, 0xbf0081f0, 0x100003, 0xf01368c3, 0xd1050f03, 0x22214b10, 0xf04f601a, 0x477030ff, 0x2f00f413, 0x320f003, 0xb11bd00b, 0x68586a43, 0x47703801, 0x68016903, 0x43db6982, 0x18181888, 0xb1134770, 0x68586a43, 0x69834770, 0x18d26802, 0x1ad06903, 0xbf004770, 0x200018f8, 0x4604b510, 0xf806f000, 0x46204601, 0x4010e8bd, 0xb960f000, 0x1c41b510, 0xf810e004, 0xb90b3b01, 0xbd101a40, 0xf03f010, 0x4602d1f7, 0x3b04f850, 0x3401f1a3, 0x403ea24, 0x3f80f014, 0xf013d0f5, 0xd00b0fff, 0x4f7ff413, 0xf413d006, 0xd0010f7f, 0xe0041d13, 0xe0021cd3, 0xe0001c93, 0x1a581c53, 0x68c3bd10, 0xf013b570, 0x46050403, 0xf013d019, 0xd0040f20, 0x685e6a43, 0xfd76f7ff, 0x6983e004, 0x18f66806, 0x1af66903, 0x462868eb, 0x5340f423, 0xf7ff60eb, 0x4631fdc2, 0x22004604, 0xf7ff4628, 0x4620feff, 0xbd70, 0x4ff0e92d, 0x5760d0e, 0x460f0d76, 0x461d4614, 0x2e00469c, 0xf240d05c, 0x428e71ff, 0xd1bd058, 0xd5b055b, 0xd0532b00, 0xd051428b, 0x107ea85, 0x477ff027, 0x770f427, 0x2ac2ea4f, 0x1780f447, 0x890afba7, 0xab00fbaa, 0xd5318f6, 0x2cc5ea43, 0xeb1b2500, 0xf1450408, 0xf04c0500, 0xfbe04c00, 0x2300450c, 0x209eb15, 0x300f143, 0x230cfbe7, 0x1f80f5b3, 0x6680f5a6, 0x4100f001, 0x49aea44, 0x1892d206, 0x303eb43, 0x43020fe0, 0xe0000064, 0xfe03601, 0xf1431812, 0x46180300, 0x4f00f1b4, 0x73fdf240, 0xf022bf08, 0x429e0201, 0xea41d806, 0x5360300, 0x461018f1, 0x8ff0e8bd, 0xbfa42e00, 0x41fef041, 0x170f441, 0x46102200, 0x8ff0e8bd, 0x207ea8c, 0x1300f46f, 0x429f007f, 0x4200f002, 0xebb3d806, 0xd3060f4c, 0x20004611, 0x8ff0e8bd, 0x1f00f517, 0xea4fd10b, 0xf51c0c4c, 0xd8061f00, 0x57f0d7f, 0xea4fb11f, 0x55b535c, 0x2000b91b, 0xe8bd4904, 0xf0428ff0, 0xf44141fe, 0x20000170, 0x8ff0e8bd, 0x7ff80000, 0x4603b910, 0xe0204602, 0xd1010c03, 0xe0010400, 0x7180f101, 0xd1010e03, 0xe0010200, 0x100f501, 0xd1010f03, 0xe0010100, 0x180f501, 0xd1010f83, 0xe0010080, 0x1100f501, 0xdb012800, 0xe0010040, 0x1180f501, 0x23e0eb01, 0x46100542, 0x47704619, 0x4180f04f, 0xbfd4f7ff, 0x460eb570, 0x4619461d, 0x306ea55, 0x446ea4f, 0xf514d407, 0xd8171f00, 0xd81942ae, 0x4290d114, 0xf514e00e, 0xd80f1f00, 0xf513006b, 0xd80b1f00, 0xd1014304, 0xd0094313, 0xd80942b1, 0x4282d10a, 0x2000bf94, 0xbd702001, 0xbd702000, 0xbd704618, 0xbd702001, 0xbd702000, 0x3a044603, 0xb2c9d308, 0x2101ea41, 0x4101ea41, 0xf8433a04, 0xd2fb1b04, 0xd0023204, 0x54993a01, 0x4770d1fc, 0x49012018, 0x4770beab, 0x20026, 0x4669b403, 0xbeab2002, 0x4770b002, 0x4669b403, 0xbeab200c, 0x4770b002, 0x4669b403, 0xbeab2009, 0x4770b002, 0x4669b403, 0xbeab200e, 0x4770b002, 0x4669b403, 0xbeab200a, 0x4770b002, 0x4669b40f, 0xbeab200d, 0x4770b004, 0x4669b40f, 0xbeab2005, 0x4770b004, 0x4b0cb538, 0xb90a681a, 0x601a4a0b, 0x681c1cc5, 0x503f025, 0x46281965, 0xf812f000, 0x4b05b910, 0xe004601d, 0x220c4b05, 0xf04f601a, 0x462034ff, 0xbf00bd38, 0x20001aac, 0x20001ab0, 0x200018f8, 0x466b4a08, 0xd9014293, 0xd2064298, 0xb1334b06, 0xbf344298, 0x20012000, 0x20014770, 0x46184770, 0xbf004770, 0x20001ab0, 0x00000000, 0x220209, 0xc0000101, 0x40932, 0x30100, 0x21090000, 0x1000100, 0x7001722, 0x40038105, 0x100, 0x2000112, 0x40000000, 0xfffeffff, 0x100, 0x100, 0x7090105, 0x70501a1, 0x65290019, 0x65250015, 0x1950875, 0xc00081, 0x770072, 0x202a2a2a, 0x7973435f, 0x6c615f73, 0x20636f6c, 0x6c696166, 0xa6465, 0x5b5a5962, 0x5f5e5d5c, 0x636160, 0x00000000, 0x00000000, 0x1312d00, };
// // Copyright (c) 2013 SILICON LABORATORIES, INC. // // FILE NAME : dp_swd.c // TARGET MCU : C8051F380 // DESCRIPTION : ARM CoreSight SW-DP Interface // // This file implements an interface to the ARM CoreSight Serial Wire Debug // (SWD) - Debug Port (DP). // #include <compiler_defs.h> #include "32bit_prog_defs.h" //----------------------------------------------------------------------------- // Project Variables //----------------------------------------------------------------------------- // Holds the last acknowledge error from the start of a move command. // Also used by the Serial Wire module. U8 idata ack_error; #if 1 // Note how the bit addresses are arranged to provide an endian swap. // io_word is stored BE (matches the Keil C compliler), while the bit addresses // are LE (matches the wire interface). SEGMENT_VARIABLE( io_word, UU32, SEG_BDATA ); // Used to provide bit addressable data for 8-bit and smaller shift routines. // Also used by the Serial Wire module. SEGMENT_VARIABLE( io_byte, U8, SEG_BDATA ); SBIT (iow_0, io_word.U32, 24); SBIT (iow_1, io_word.U32, 25); SBIT (iow_2, io_word.U32, 26); SBIT (iow_3, io_word.U32, 27); SBIT (iow_4, io_word.U32, 28); SBIT (iow_5, io_word.U32, 29); SBIT (iow_6, io_word.U32, 30); SBIT (iow_7, io_word.U32, 31); SBIT (iow_8, io_word.U32, 16); SBIT (iow_9, io_word.U32, 17); SBIT (iow_10, io_word.U32, 18); SBIT (iow_11, io_word.U32, 19); SBIT (iow_12, io_word.U32, 20); SBIT (iow_13, io_word.U32, 21); SBIT (iow_14, io_word.U32, 22); SBIT (iow_15, io_word.U32, 23); SBIT (iow_16, io_word.U32, 8); SBIT (iow_17, io_word.U32, 9); SBIT (iow_18, io_word.U32, 10); SBIT (iow_19, io_word.U32, 11); SBIT (iow_20, io_word.U32, 12); SBIT (iow_21, io_word.U32, 13); SBIT (iow_22, io_word.U32, 14); SBIT (iow_23, io_word.U32, 15); SBIT (iow_24, io_word.U32, 0); SBIT (iow_25, io_word.U32, 1); SBIT (iow_26, io_word.U32, 2); SBIT (iow_27, io_word.U32, 3); SBIT (iow_28, io_word.U32, 4); SBIT (iow_29, io_word.U32, 5); SBIT (iow_30, io_word.U32, 6); SBIT (iow_31, io_word.U32, 7); SBIT (iob_0, io_byte, 0); SBIT (iob_1, io_byte, 1); SBIT (iob_2, io_byte, 2); SBIT (iob_3, io_byte, 3); SBIT (iob_4, io_byte, 4); SBIT (iob_5, io_byte, 5); SBIT (iob_6, io_byte, 6); SBIT (iob_7, io_byte, 7); #else UU32 io_word; volatile U8 bdata io_byte; #endif //----------------------------------------------------------------------------- // Variables Declarations //----------------------------------------------------------------------------- // Controls SW connection sequence. 0=SW-DP, 1=SWJ-DP (use switch sequence) U8 idata swj_dp_type; // Even parity lookup table, holds even parity result for a 4-bit value. const U8 code even_parity[] = { 0x00, 0x10, 0x10, 0x00, 0x10, 0x00, 0x00, 0x10, 0x10, 0x00, 0x00, 0x10, 0x00, 0x10, 0x10, 0x00 }; //----------------------------------------------------------------------------- // SWD Host Command Handlers //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // StrobeSWCLK //----------------------------------------------------------------------------- // // Pulls SWCLK high then low. // #define _StrobeSWCLK { SWCLK_Out = 1; SWCLK_Out = 0; }; //----------------------------------------------------------------------------- // SWD_Initialize //----------------------------------------------------------------------------- // // Initializes SWD configuration data at startup. // void SWD_Initialize( void ) { swj_dp_type = FALSE; // Default DP type is DP-SW } //----------------------------------------------------------------------------- // (0x20) SWD_Configure //----------------------------------------------------------------------------- // // Sets the debug port (DP) type to either Serial Wire only or Serial Wire JTAG. // The firmware needs to know this because the connection sequence is different // depending on the DP type. // // Parameters: // 1. DP_Type - Debug Port type. 0=SW, 1=SWJ // // Returns: // 1. HOST_COMMAND_OK // STATUS SWD_Configure( U8 dp_type ) { swj_dp_type = dp_type; return HOST_COMMAND_OK; } //----------------------------------------------------------------------------- // (0x21) SWD_Connect //----------------------------------------------------------------------------- // // Sets the target device for Serial Wire communication and returns the // 32-bit ID code. Must be called before performing any SWD commands. // // Returns: // 1-4. IDCODE - Value read from the IDCODE register (32-bit). // 5. Response code. // STATUS SWD_Connect( void ) { U8 rtn; // Initialize IO pins for SWD interface _SetSWPinsIdle; // Select the Serial Wire Debug Port // Skip this switch sequence if the device does not have the swj_dp port // Serial Wire + JTAG SW_ShiftReset( ); SW_ShiftByteOut( 0x9E ); SW_ShiftByteOut( 0xE7 ); // Reset the line and return the 32-bit ID code rtn = SWD_LineReset( ); //SendLongToHost(io_word.U32); return rtn; } //----------------------------------------------------------------------------- // (0x30) SWD_Disconnect //----------------------------------------------------------------------------- // // Switches the debug interface to JTAG communication and disconnects pins. // // Returns: // 1. HOST_COMMAND_OK // STATUS SWD_Disconnect( void ) { // Initialize IO pins for SWD interface _SetSWPinsIdle; // Select the JTAG Debug Port // Skip this switch sequence if the device does not have the swj_dp port // Serial Wire + JTAG SW_ShiftReset( ); SW_ShiftByteOut( 0x3C ); SW_ShiftByteOut( 0xE7 ); // Release debug interface pins except nSRST _ResetDebugPins; return HOST_COMMAND_OK; } //----------------------------------------------------------------------------- // (0x31) SWD_LineReset //----------------------------------------------------------------------------- // // Performs a line reset on the Serial Wire interface. // // Returns: // 1. Response code. // STATUS SWD_LineReset( void ) { U8 ack; // Complete SWD reset sequence (50 cycles high followed by 2 or more idle cycles) SW_ShiftReset( ); SW_ShiftByteOut( 0 ); // Now read the DPIDR register to move the SWD out of reset ack = SW_ShiftPacket( SW_IDCODE_RD, 1 ); SW_ShiftByteOut( 0 ); return SW_Response( ack ); } //----------------------------------------------------------------------------- // (0x32) SWD_ClearErrors //----------------------------------------------------------------------------- // // Clears all the error/sticky bits in the DP Control/Status register. // // Returns: // 1-4. DP_CSR - DP_CTRLSTAT register value before the clear (32-bit, LE). // 5-8. DP_CSR - DP_CTRLSTAT register value after the clear (32-bit, LE). // 9. Response code. // STATUS SWD_ClearErrors( void ) { U8 ack; // First read the DP-CSR register and send the value to the host. SW_ShiftPacket( SW_CTRLSTAT_RD, 1 ); //SendLongToHost(io_word.U32); // Clear all error/sticky bits by writing to the abort register. io_word.U32 = 0x1E; SW_ShiftPacket( SW_ABORT_WR, 1 ); // Read the DP-CSR register again and send the results to the host. ack = SW_ShiftPacket( SW_CTRLSTAT_RD, 1 ); SW_ShiftByteOut( 0 ); //SendLongToHost(io_word.U32); return SW_Response( ack ); } //----------------------------------------------------------------------------- // (0x34) SWD_DAP_Move //----------------------------------------------------------------------------- // // Reads or writes one Debug/Access Port address one or more times. // // Parameters: // 1. Count - Number of words to transfer minus one (i.e. 0=move 1 word). // 2. DAP_Addr - The DAP register address to transfer one or more times. // 3-n. Words[] - Array of 32-bit LE words (write transfers only). // // Returns: // 1-n. Words[] - Array of 32-bit LE words (read transfers only). // n+1. Response code. // // Uses: // ack_error - Resets error accumulator. // STATUS SWD_DAP_Move( U8 cnt, U8 dap, U32 * transfer_data ) { // Reset global error accumulator ack_error = SW_ACK_OK; // Determine if this is a read or write transfer if ( dap & DAP_CMD_RnW ) { // Perform the requested number of reads SW_DAP_Read( cnt, dap, transfer_data ); } else { SW_DAP_Write( cnt, dap, transfer_data, TRUE ); } // Finish with idle cycles SW_ShiftByteOut( 0 ); // Return the accumulated error result return SW_Response( ack_error ); } //----------------------------------------------------------------------------- // SWD Helper Functions //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // SW_Response //----------------------------------------------------------------------------- // // Converts SWD acknowledge value into a host response code. // // Parameters: // SW_Ack - 3-bit SWD acknowledge code. // // Returns: // 8-bit host response code. // STATUS SW_Response( U8 SW_Ack ) { switch ( SW_Ack ) { case SW_ACK_OK: return HOST_COMMAND_OK; case SW_ACK_WAIT: return HOST_AP_TIMEOUT; case SW_ACK_FAULT: return HOST_ACK_FAULT; default: return HOST_WIRE_ERROR; } } //----------------------------------------------------------------------------- // SW_DAP_Read //----------------------------------------------------------------------------- // // Does one or more reads of one Debug/Access Port register and returns each // 32-bit word to the host. // // Parameters: // cnt - Number of words to read minus one (i.e. 0=read 1 word). // DAP_Addr - The DAP register address to read one or more times. // void SW_DAP_Read( U8 cnt, U8 DAP_Addr, U32 * read_data ) { U8 req; // Format the packet request header req = SW_Request( DAP_Addr ); // Shift the first packet and if DP access, send the results SW_ShiftPacket( req, 0 ); if ( !( req & SW_REQ_APnDP ) ) { *read_data = io_word.U32; read_data++; } // Perform the requested number of reads for ( ; cnt != 0; cnt-- ) { SW_ShiftPacket( req, 0 ); *read_data = io_word.U32; read_data++; } // For AP access, get and send results of the last read if ( req & SW_REQ_APnDP ) { SW_ShiftPacket( SW_RDBUFF_RD, 0 ); *read_data = io_word.U32; read_data++; } } //----------------------------------------------------------------------------- // SW_DAP_Write //----------------------------------------------------------------------------- // // Does one or more writes to one Debug/Access Port register getting each // 32-bit word from the host. // // Parameters: // cnt - Number of words to write minus one (ie 0=write 1 word). // DAP_Addr - The DAP register address to write one or more times. // final - True if this is the final transfer of a move sequence. // void SW_DAP_Write( U8 cnt, U8 DAP_Addr, U32 * write_data, BOOL final ) { U8 req; // Format the packet request header req = SW_Request( DAP_Addr ); // Perform the requested number of writes do { io_word.U32 = *write_data; write_data++; #if 0 // Clear the upper half word for 16-bit packed writes io_word.U16[MSB] = 0; // For packed transfers, write 16-bits at a time if (DAP_Addr & DAP_CMD_PACKED) { SW_ShiftPacket(req, 0); io_word.U32 = *write_data; write_data++; // Clear the upper half word for 16-bit packed writes io_word.U16[MSB] = 0; } else { io_word.U16[MSB] = (U16) *write_data; write_data++; } #endif SW_ShiftPacket( req, 0 ); }while ( cnt-- != 0 ); // For AP access, check results of last write (use default retry count // because previous write may need time to complete) if ( final && ( req & SW_REQ_APnDP ) ) { SW_ShiftPacket( SW_RDBUFF_RD, 0 ); } } //----------------------------------------------------------------------------- // SW_Request //----------------------------------------------------------------------------- // // Converts DAP address into SWD packet request value. // // Parameters: // DAP_Addr - 4-bit DAP address (A3:A2:RnW:APnDP). // // Returns: // Complete 8-bit packet request value. Includes parity, start, etc. // U8 SW_Request( U8 DAP_Addr ) { U8 req; // Convert the DAP address into a SWD packet request value req = DAP_Addr & DAP_CMD_MASK; // mask off the bank select bits req = req | even_parity[ req ]; // compute and add parity bit req = req << 1; // move address/parity bits req = req | SW_REQ_PARK_START; // add start and park bits return req; } //----------------------------------------------------------------------------- // SW_CalcDataParity //----------------------------------------------------------------------------- // // Calculates even parity over the 32-bit value in io_word.U32. Contents of // io_word are not changed. // // Returns: // 1-bit even parity. // // Uses: // io_word - Holds 32-bit value to compute parity on. // bit SW_CalcDataParity( void ) { U8 parity; // Calculate column parity, reducing down to 4 columns parity = io_word.U8[ b0 ]; parity ^= io_word.U8[ b1 ]; parity ^= io_word.U8[ b2 ]; parity ^= io_word.U8[ b3 ]; parity ^= parity >> 4; // Use lookup table to get parity on 4 remaining bits. The cast (bit) // converts any non-zero value to 1. return (bit) even_parity[ parity & 0xF ]; } //----------------------------------------------------------------------------- // SW_ShiftReset //----------------------------------------------------------------------------- // // Puts the SWD into the reset state by clocking 64 times with SWDIO high. // Leaves SWDIO an output and high. // void SW_ShiftReset( void ) { U8 i; // Drive SWDIO high SWDIO_Out = 1; _SetSWDIOasOutput; // Complete 64 SWCLK cycles for ( i = 64; i != 0; i-- ) { _StrobeSWCLK } } //----------------------------------------------------------------------------- // SW_ShiftPacket //----------------------------------------------------------------------------- // // Completes one serial wire packet transfer (read or write). Expects SWDIO to // be an output on entry. // // Parameters: // request - Complete 8-bit packet request value. Includes parity, start, etc. // retry - Number of times to try the request while the target ack is WAIT. // 0 = use the system default retry count // n = try the request upto n times // // Returns: // 3-bit SWD acknowledge code. // Leaves SWDIO an output and low. // // Uses: // ack_error - Updated if there was a transfer error. // io_byte - Used for all transfers. // io_word - On entry, holds the 32-bit word data to transfer on writes. // On exit, holds the 32-bit word data transfered on reads. // U8 SW_ShiftPacket( U8 request, U8 retry ) { U8 ack, limit, i; // If retry parameter is zero, use the default value instead if ( retry == 0 ) { retry = DAP_RETRY_COUNT; } limit = retry; // While waiting, do request phase (8-bit request, turnaround, 3-bit ack) do { // Turnaround or idle cycle, makes or keeps SWDIO an output SWDIO_Out = 0; _SetSWDIOasOutput; _StrobeSWCLK // Shift out the 8-bit packet request SW_ShiftByteOut( request ); // Turnaround cycle makes SWDIO an input _SetSWDIOasInput; _StrobeSWCLK // Shift in the 3-bit acknowledge response io_byte = 0; iob_0 = SWDIO_In; _StrobeSWCLK iob_1 = SWDIO_In; _StrobeSWCLK iob_2 = SWDIO_In; _StrobeSWCLK ack = io_byte; // Check if we need to retry the request if ( ( ack == SW_ACK_WAIT ) && --retry ) { // Delay an increasing amount with each retry for ( i = retry; i < limit; i++ ) ; } else { break; // Request phase complete (or timeout) } }while ( TRUE ); // If the request was accepted, do the data transfer phase (turnaround if // writing, 32-bit data, and parity) if ( ack == SW_ACK_OK ) { if ( request & SW_REQ_RnW ) { // Swap endian order while shifting in 32-bits of data io_word.U8[ b0 ] = SW_ShiftByteIn( ); io_word.U8[ b1 ] = SW_ShiftByteIn( ); io_word.U8[ b2 ] = SW_ShiftByteIn( ); io_word.U8[ b3 ] = SW_ShiftByteIn( ); // Shift in the parity bit iob_0 = SWDIO_In; _StrobeSWCLK // Check for parity error if ( iob_0 ^ SW_CalcDataParity( ) ) { ack = SW_ACK_PARITY_ERR; } } else { // Turnaround cycle makes SWDIO an output _SetSWDIOasOutput; _StrobeSWCLK // Swap endian order while shifting out 32-bits of data SW_ShiftByteOut( io_word.U8[ b0 ] ); SW_ShiftByteOut( io_word.U8[ b1 ] ); SW_ShiftByteOut( io_word.U8[ b2 ] ); SW_ShiftByteOut( io_word.U8[ b3 ] ); // Shift out the parity bit SWDIO_Out = SW_CalcDataParity( ); _StrobeSWCLK } } // TODO: Add error (FAULT, line, parity) handling here? RESEND on parity error? // Turnaround or idle cycle, always leave SWDIO an output SWDIO_Out = 0; _SetSWDIOasOutput; _StrobeSWCLK // Update the global error accumulator if there was an error if ( ack != SW_ACK_OK ) { ack_error = ack; } return ack; } //----------------------------------------------------------------------------- // SW_ShiftByteOut //----------------------------------------------------------------------------- // // Shifts an 8-bit byte out the SWDIO pin. // // Parameters: // byte - The 8-bit byte to shift out on SWDIO. // // Uses: // io_byte - Holds byte as it is shifted out. // #pragma OT(8, SPEED) void SW_ShiftByteOut( U8 byte ) { // Make sure SWDIO is an output _SetSWDIOasOutput; // Copy data to bit addressable location io_byte = byte; // Shift 8-bits out on SWDIO SWDIO_Out = iob_0; _StrobeSWCLK SWDIO_Out = iob_1; _StrobeSWCLK SWDIO_Out = iob_2; _StrobeSWCLK SWDIO_Out = iob_3; _StrobeSWCLK SWDIO_Out = iob_4; _StrobeSWCLK SWDIO_Out = iob_5; _StrobeSWCLK SWDIO_Out = iob_6; _StrobeSWCLK SWDIO_Out = iob_7; _StrobeSWCLK } //----------------------------------------------------------------------------- // SW_ShiftByteIn //----------------------------------------------------------------------------- // // Shifts an 8-bit byte in from the SWDIO pin. // // Returns: // 8-bit byte value shifted in on SWDIO. // // Uses: // io_byte - Holds byte as it is shifted in. // #pragma OT(8, SPEED) U8 SW_ShiftByteIn( void ) { // Make sure SWDIO is an input _SetSWDIOasInput; // Shift 8-bits in on SWDIO iob_0 = SWDIO_In; _StrobeSWCLK iob_1 = SWDIO_In; _StrobeSWCLK iob_2 = SWDIO_In; _StrobeSWCLK iob_3 = SWDIO_In; _StrobeSWCLK iob_4 = SWDIO_In; _StrobeSWCLK iob_5 = SWDIO_In; _StrobeSWCLK iob_6 = SWDIO_In; _StrobeSWCLK iob_7 = SWDIO_In; _StrobeSWCLK // Return the byte that was shifted in return io_byte; }
// // Copyright (c) 2013 SILICON LABORATORIES, INC. // // FILE NAME : main.c // TARGET MCU : C8051F380 // DESCRIPTION : ARM Debug Interface for a 32-bit Programmer // // This program demonstrates the basic Serial Wire interface functionality. // It does not include the procedures to write, erase, or read flash. // // NOTES: // 1) Remove J15 from the 'F38x Target Board. // 2) Connect SWDIO (P1.1), SWCLK (P1.3), and ground to the 10-pin CoreSight // connector of an SiM3U/C/L. // 3) Run the code and observe that transfer_data contains the correct IDCODE // to validate the SW interface. // // #include <compiler_defs.h> #include <C8051F380_defs.h> #include "32bit_prog_defs.h" #include "Init.h" #include "bin_array.h" //----------------------------------------------------------------------------- // Variables Declarations //----------------------------------------------------------------------------- // Debug Port (DP) type. Tracks the type of the current DP connection. U8 DP_Type; // Possible values for DP_Type. enum { DP_TYPE_NONE, DP_TYPE_SWD }; // Cortex M3 Debug Registers (AHB addresses) #define DDFSR 0xE000ED30 // Debug Fault StatusRegister #define DHCSR 0xE000EDF0 // Debug Halting Control and Status Register #define DCRSR 0xE000EDF4 // Debug Core Register Selector Register #define DCRDR 0xE000EDF8 // Debug Core Register Data Register #define DEMCR 0xE000EDFC // Debug Exception and Monitor Control Register #define AIRCR 0xE000ED0C // The Application Interrupt and Reset Control Register // Cortex M3 Memory Access Port #define MEMAP_BANK_0 0x00000000 // BANK 0 => CSW, TAR, Reserved, DRW #define MEMAP_BANK_1 0x00000010 // BANK 1 => BD0, BD1, BD2, BD3 // SiM3 Chip Access Port (SiLabs specific Debug Access Port) #define CHIPAP_BANK_0 0x0A000000 // BANK 0 => CTRL1, CTRL2, LOCK, CRC #define CHIPAP_BANK_1 0x0A000010 // BANK 1 => INIT_STAT, DAP_IN, DAP_OUT, None #define CHIPAP_BANK_F 0x0A0000F0 // BANK F => None, None, None, ID // MEMAP register addresses #define MEMAP_CSW 0x01 #define MEMAP_TAR 0x05 #define MEMAP_DRW_WR 0x0D #define MEMAP_DRW_RD 0x0F // CHIPAP register addresses #define CHIPAP_CTRL1_WR 0x01 #define CHIPAP_CTRL2_WR 0x05 #define CHIPAP_ID_WR 0x0D #define CHIPAP_ID_RD 0x0F #ifdef SRAM_PROGRAMMING void connect_and_halt_core() { U32 rw_data; rw_data = CHIPAP_BANK_F; SWD_DAP_Move(0, DAP_SELECT_WR, &rw_data); SWD_DAP_Move(0, CHIPAP_ID_RD, &rw_data); if (rw_data != 0x2430002) { return; } // CTRL1.core_reset_ap = 1 rw_data = CHIPAP_BANK_0; SWD_DAP_Move(0, DAP_SELECT_WR, &rw_data); rw_data = 0x08; SWD_DAP_Move(0, CHIPAP_CTRL1_WR, &rw_data); // Select MEM BANK 0 rw_data = MEMAP_BANK_0; SWD_DAP_Move(0, DAP_SELECT_WR, &rw_data); // 32 bit memory access, auto increment rw_data = 0x23000002; SWD_DAP_Move(0, MEMAP_CSW, &rw_data); // DHCSR.C_DEBUGEN = 1 rw_data = DHCSR; SWD_DAP_Move(0, MEMAP_TAR, &rw_data); rw_data = 0xA05F0001; SWD_DAP_Move(0, MEMAP_DRW_WR, &rw_data); // DEMCR.VC_CORERESET = 1 rw_data = DEMCR; SWD_DAP_Move(0, MEMAP_TAR, &rw_data); rw_data = 0x1; SWD_DAP_Move(0, MEMAP_DRW_WR, &rw_data); // reset the core rw_data = AIRCR; SWD_DAP_Move(0, MEMAP_TAR, &rw_data); rw_data = 0xFA050004; SWD_DAP_Move(0, MEMAP_DRW_WR, &rw_data); // CTRL1.core_reset_ap = 0 rw_data = CHIPAP_BANK_0; SWD_DAP_Move(0, DAP_SELECT_WR, &rw_data); rw_data = 0; SWD_DAP_Move(0, CHIPAP_CTRL1_WR, &rw_data); // Select MEM BANK 0 rw_data = MEMAP_BANK_0; SWD_DAP_Move(0, DAP_SELECT_WR, &rw_data); } void write_sequential_words(U32 addr, U32 len, U32 *rw_data) { U32 i, tmp; U32 *buf = rw_data; tmp = MEMAP_BANK_0; SWD_DAP_Move(0, DAP_SELECT_WR, &tmp); // 32 bit memory access, auto increment tmp = 0x23000012; SWD_DAP_Move(0, MEMAP_CSW, &tmp); SWD_DAP_Move(0, MEMAP_TAR, &addr); for (i = 0; i < len; i++) { SWD_DAP_Move(0, MEMAP_DRW_WR, buf++); } } void read_sequential_words(U32 addr, U32 len, U32 *rw_data) { U32 i, tmp; U32 *buf = rw_data; tmp = MEMAP_BANK_0; SWD_DAP_Move(0, DAP_SELECT_WR, &tmp); // 32 bit memory access, auto increment tmp = 0x23000012; SWD_DAP_Move(0, MEMAP_CSW, &tmp); SWD_DAP_Move(0, MEMAP_TAR, &addr); for (i = 0; i < len; i++) { SWD_DAP_Move(0, MEMAP_DRW_RD, buf++); } } void swd_write_core_register(U32 n, U32 *rw_data) { U32 tmp; tmp = MEMAP_BANK_0; SWD_DAP_Move(0, DAP_SELECT_WR, &tmp); tmp = 0x23000002; SWD_DAP_Move(0, MEMAP_CSW, &tmp); tmp = DCRDR; SWD_DAP_Move(0, MEMAP_TAR, &tmp); SWD_DAP_Move(0, MEMAP_DRW_WR, rw_data); tmp = DCRSR; SWD_DAP_Move(0, MEMAP_TAR, &tmp); n = n | (0x10000); SWD_DAP_Move(0, MEMAP_DRW_WR, &n); } void swd_read_core_register(U32 n, U32 *rw_data) { U32 tmp; tmp = MEMAP_BANK_0; SWD_DAP_Move(0, DAP_SELECT_WR, &tmp); tmp = 0x23000002; SWD_DAP_Move(0, MEMAP_CSW, &tmp); tmp = DCRSR; SWD_DAP_Move(0, MEMAP_TAR, &tmp); SWD_DAP_Move(0, MEMAP_DRW_WR, &n); tmp = DCRDR; SWD_DAP_Move(0, MEMAP_TAR, &tmp); SWD_DAP_Move(0, MEMAP_DRW_RD, rw_data); } void programming_sram() { U32 i, size, count, addr = 0x20000000; size = sizeof(binraw) / 4; for (i = 0; i < size; i += 1024) { if ((i + 1024) < size) { count = 1024; } else { count = size - i; } write_sequential_words(addr + i * 4, count, &binraw[i]); } write_sequential_words(0xe000ed08, 1, &addr); addr = binraw[1] & 0xFFFFFFFE; swd_write_core_register(15, &addr); addr = binraw[0]; swd_write_core_register(13, &addr); addr = 0xA05F0000; write_sequential_words(DHCSR, 1, &addr); } #endif //----------------------------------------------------------------------------- // main() //----------------------------------------------------------------------------- void main( void ) { U32 transfer_data; WDT_Init( ); Oscillator_Init( ); Port_Init( ); // These pins are grounded on the CoreSight debug connector P1_4 = 0; P1_2 = 0; // There is no debug port connection at this point DP_Type = DP_TYPE_NONE; SWD_Initialize( ); SWD_Configure( DP_TYPE_SWD ); SWD_Connect( ); transfer_data = 0x00000000; // Read the IDCODE from the connected device SWD_DAP_Move( 0, DAP_IDCODE_RD, &transfer_data ); // The return value from DAP_IDCODE_RD for SiM3U1xx devices is 0x2BA01477 // Write the CTRLSTAT register to enable the debug hardware transfer_data = 0x50000000; SWD_DAP_Move( 0, DAP_CTRLSTAT_WR, &transfer_data ); SWD_ClearErrors( ); connect_and_halt_core( ); programming_sram( ); transfer_data = 0x00000000; SWD_DAP_Move( 0, DAP_CTRLSTAT_WR, &transfer_data ); SWD_Disconnect( ); while ( 1 ) { } } //----------------------------------------------------------------------------- // Initialization //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // Subroutines //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // DBG_Reset //----------------------------------------------------------------------------- // // This function returns all debug pins to a neutral state: // 1. Disconnects from the target. // 2. Resets all I/O pins. // // void DBG_Reset( void ) { SWD_Connect( ); // Reset all I/O ports Port_Init( ); // We are disconnecting, so release nSRST _ReleaseTargetReset; }
