Papilio Pro Boards

http://papilio.cc/index.php?n=Papilio.PapilioOne

The Papilio is an Open Source FPGA development board based on the Xilinx Spartan 3E FPGA (datasheet). It has 48 I/O lines, dual channel USB, integrated JTAG programmer, 4 power supplies, and a power connector. It provides everything needed to start learning Digital Electronics.

 

Power

• Four independent power rails at 5V, 3.3V, 2.5V, and 1.2V.
• Power supplied by a power connector or USB.
• DC Input Jack.
  • Input Voltage (recommended): 6.5-10V

USB

• Two channel USB connection for JTAG and serial communications implemented with FT2232D.
• EEPROM memory to store configuration settings for FT2232 USB chip.

Spartan 3E FPGA

• 32MHz oscillator that can be used by Xilinx's DCM to generate any required clock speed.
• VTQFP-100 footprint that supports Xilinx XC3S100E, XC3S250E, and XC3S500Eparts.
• I/O can be set to support 1.2V, 2.5V, or 3.3V.

SPI Flash

• 4M SPI Flash

Wings

• 48 bidirectional I/O lines which can be split up as:
  • 1x 32 Bit Wing or
  • 3x 16 Bit Wings or
  • 6x 8 Bit Wings
• .1" spacing for compatibility with bread boards.

Dimensions

• 2.7"x2.7"

http://papilio.cc/index.php?n=Papilio.PapilioPro

The Papilio Pro is an Open Source FPGA development board based on the Xilinx Spartan 6 LX FPGA. It has 48 I/O lines, dual channel USB, integrated JTAG programmer, 64Mb SDRAM, and an efficient switching power supply.

• Spartan 6 LX9 FPGA (Datasheet)
• High efficiency LTC3419 Step Down Dual Voltage Regulator (Datasheet)
• Dual Channel FTDI FT2232 USB 2.0 Full Speed Interface (Datasheet)
• 64Mbit Micron MT48LC4M16 SDRAM (Datasheet)
• 64Mbit Macronix MX25L6445 SPI Flash (Datasheet)
• 48 I/O pins arranged in a Papilio Wing form factor
• 32Mhz Crystal Oscillator

The Papilio Pro includes a 64Mbit Micron MT48LC4M16SDRAM chip. This additional SDRAM will open up a whole new breed of FPGA applications for the Papilio. The timing requirements and refresh signals of the SDRAM chip do make interfacing it more of a challenge than interfacing regular SRAM, or the internal BRAM. We are working on a SDRAM controller that you can drop into your designs so the SDRAM can be used like regular SRAM.

 

SDRAM Designs

• Hamster's SDRAM Controller
• Alvie's ZPUino SDRAM controller. (derived from Hamster's SDRAM controller).
• Wishbone wrapper for Alvie's SDRAM controller.
• XAPP 394 Interfacing Mobile SDRAM with CPLD's.