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近似计算Survey阅读笔记
sasasatori 2024-01-26 15:34 阅读:656 评论:0 推荐:1 编辑
ARM Memory Compiler 学习
sasasatori 2024-01-14 21:21 阅读:4098 评论:0 推荐:2 编辑
使用SystemC建模SystemVerilog状态机的实例
sasasatori 2023-12-13 21:44 阅读:460 评论:0 推荐:0 编辑
SystemC简介与安装
sasasatori 2023-11-29 18:17 阅读:1129 评论:0 推荐:2 编辑
DesignWareBuildingBlock IP的仿真与综合
sasasatori 2023-09-25 22:50 阅读:477 评论:0 推荐:0 编辑
DesignWare Building Block IP学习
sasasatori 2023-09-21 20:25 阅读:1396 评论:0 推荐:0 编辑
SystemVerilog总结
sasasatori 2023-06-24 10:33 阅读:545 评论:0 推荐:1 编辑
SystemVerilog for Design Edition 2 Chapter 10 SystemVerilog Interfaces
sasasatori 2023-06-21 21:01 阅读:410 评论:0 推荐:0 编辑
SystemVerilog for Design Edition 2 Chapter 9 SystemVerilog Design Hierarchy
sasasatori 2023-06-20 12:03 阅读:163 评论:0 推荐:0 编辑
SystemVerilog for Design Edition 2 Chapter 8 Modeling Finite State Machines with SystemVerilog
sasasatori 2023-06-16 23:16 阅读:275 评论:0 推荐:0 编辑
SystemVerilog for Design Edition 2 Chapter 7 SystemVerilog Procedural Statements
sasasatori 2023-06-05 23:21 阅读:105 评论:0 推荐:0 编辑
SystemVerilog for Design Edition 2 Chapter 6 SystemVerilog Procedural Blocks, Tasks and Functions
sasasatori 2023-05-23 23:41 阅读:137 评论:0 推荐:0 编辑
SystemVerilog for Design Edition 2 Chapter 5 SystemVerilog Arrays, Structures and Unions
sasasatori 2023-05-22 23:43 阅读:831 评论:0 推荐:0 编辑
数模混合设计的LVS流程
sasasatori 2023-05-21 23:39 阅读:3933 评论:0 推荐:1 编辑
23年5.12流片delay复盘
sasasatori 2023-05-10 23:50 阅读:518 评论:0 推荐:0 编辑
SystemVerilog for Design Edition 2 Chapter 4 SystemVerilog User-Defined and Enumerated Types
sasasatori 2023-05-10 22:10 阅读:1039 评论:0 推荐:0 编辑
2022.09-2023.05数字前端工作总结
sasasatori 2023-05-03 01:11 阅读:1116 评论:2 推荐:0 编辑
数字asic流程实验（EX）VCS+Verdi前仿真&后仿真
sasasatori 2023-05-02 17:40 阅读:3023 评论:4 推荐:1 编辑
SystemVerilog for Design Edition 2 Chapter 3 SystemVerilog Literal Values and Built-in Data Types
sasasatori 2023-05-01 00:02 阅读:537 评论:0 推荐:0 编辑
SystemVerilog for Design Edition 2 Chapter 2 SystemVerilog Declaration Spaces
sasasatori 2023-04-30 23:31 阅读:809 评论:0 推荐:0 编辑
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