【转】各类开源IP下载(USB, ATA以及算法类IP)

无意间找到了这个表格, 标明了在opencores网站上的各类已经验证过的开源IP,提供给大家下载。

# IP Core FPGA ASIC WISH BONE Other I/F Silicon Verified Info
Networking, Communications, Connectivity
1 USB 1.1 Phy Yes! Yes!   USB, UTMI Yes! Info
2 USB 1.1 Device IP Core Yes! Yes!   UTMI Yes! Info
3 USB 2.0 Device IP Core Yes! Yes! Yes! UTMI   Info
4 Asynchronous Serial IO Controller Yes! Yes!   RS232 Yes! Info
5 Single Slot PCM Controller Yes! Yes!   TDMI Yes! Info
6 AC97 Controller IP Core Yes! Yes! Yes! AC97 Yes! Info
7 I2C Master Controller Yes! Yes! Yes! I2C Yes! Info
8 ATA/ATAPI Host Controller Yes! Yes! Yes! ATA, ATAPI Yes! Info
9 Motorola DragonBall/68K to Wishbone Bridge </> Yes! Yes! Yes! Mot. 68K/
DragonBall
Yes! Info
10 Enhanced Motorola MC68HC11 SPI IP Core </> Yes! Yes! Yes! Mot. MC68HC11 SPI Port   Info
CPU, DSP, uControllers, etc.
1 Mini-Risc CPU/Microcontroller (PIC Clone) IP Core Yes! Yes!   3 x 8bit I/O Ports Yes! Info
2 Open 54x DSP clone Yes! Yes!       Info
Encryption / Decryption
1 DES IP Core Yes! Yes!     Yes! Info
2 Triple DES    Yes! Yes!     Yes! Info
3 AES (Rijndael) IP Core    Yes! Yes!     Yes! Info
Math / Arithmetic Cores
1 Single Precision FPU (IEEE-754 compliant) IP Core Yes! Yes!     Yes! Info
2 CORDIC Core Yes! Yes!     Yes! Info
3 Hardware Dividers   Yes! Yes!       Info
Misc. Building Blocks
1 Generic FIFOs Yes! Yes!     Yes! Info
2 DMA/Bridge IP Core Yes! Yes! Yes!   Yes! Info
3 WISHBONE Interconnect Matrix Yes! Yes! Yes!   Yes! Info
4 Simple General Purpose IO   Yes! Yes! Yes! 8 bit GPIO Yes! Info
5 Simple Programmable Interrupt Controller   Yes! Yes! Yes! 8 interrupt sources Yes! Info
6 WISHBONE to OPB and OPB to WISHBONE wrappers (for Xilinx EDK only)   (Tar GZIP Archive, 22K)  Yes! Yes! Yes! OPB Yes! Info
Memory Controllers, Interfaces
1 Advanced Memory Controller IP Core Yes! Yes! Yes! SDRAM, SSRAM, FLASH Yes! Info
2 SSRAM Interface Yes! Yes! Yes! SSRAM Yes! Info
Video (CRT, LCD) Controllers, Interfaces, etc.
1 VGA/LCD Controller Yes! Yes! Yes! RGB Yes! Info
2 Video Compression System Yes! Yes!       Info
3 8x8 DCT, fully pipelined   Yes! Yes!       Info
4 QNR, Quantization   Yes! Yes!       Info
5 Huffman Encoder   Yes! Yes!       Info
6 Huffman Decoder   Yes! Yes!       Info

IP Cores that have been tested in silicon are marked by anSlicon Verifiedin thecolumn.

这些IP都是ASIC.ws公司提供的。

posted @ 2011-07-14 13:02  sangreal  阅读(728)  评论(0编辑  收藏  举报