【Thieving Magpie】搞清楚LFSR及衍生
What’s an LFSR?
看了TI的一篇paper，不得不感叹，这搞模拟的公司搞起数字来，就感觉不伦不类，连个电路图都画的让我感觉蛋疼。艹，转正题
先上几个要接触到的概念
LFSR = linear feedback shift register PSA = parallel signature analyzer PRPG = pseudorandom pattern generation
Pattern-resistant logic - logic for which the pseudorandom pattern generation technique is not well suited because the random patterns will not cause a stuck-at fault to be caught.
Signature - the final result of the compression of a number of patterns using a PSA.
Aliasing - when the signature of a PSA is correct because two or more errors cancelled each other.
Stuck-at faults - manufacturing defects (such as a shorted transistor or an open metal line) that cause an input or an output of a logic function to be permanently stuck at a high or low logic level.
一、Introduction
首先，shift register就是一堆连起来的寄存器，当插入了一些只有xor运算的组合逻辑反馈链的时候就成了LFSR，比如说
Linear feedback shift registers make extremely good pseudorandom pattern generators. When the outputs of the flip-flops are loaded with a seed value (anything except all 0s, which would cause the LFSR to produce all 0 patterns) and when the LFSR is clocked, it will generate a pseudorandom pattern of 1s and 0s. Note that the only signal necessary to generate the test patterns is the clock.
（吐槽一下TI的画图工程师，看起来这图真是蛋疼）（上面的很简单就不详细翻译了，一句话，LFSR很适合来生成伪随机序列，它只需要给一个种子，之后给时钟就可以work了）
A maximal-length LFSR produces the maximum number of PRPG patterns possible and has a pattern count equal to 2n – 1, where n is the number of register elements in the LFSR. It produces patterns that have an approximately equal number of 1s and 0s and have an equal number of runs of 1s and 0s.
二、where to use LFSR
接着，LFSR生成的伪随机序列因为基本上可以覆盖所有的序列，所以常常被用来生成激励来用来做测试DFF的激励生成逻辑，比如
老实说，我觉得这图也非常渣，看不清楚具体是干嘛的，但是要表达的意思就是说把LFSR的每个寄存器都当做ASIC待验证电路的输入，之后看这个flow
目的就是完成一个test的功能，当然LFSR也可以用来输出当做伪随机数生成器，给别的模块使用，或者接出去给外部器件使用。
三、exception
下一点，但是有些东西是搞不定的Pattern-Resistant Logic，就是LFSR生成的测试向量对于有些逻辑的错误可能无法排查，比如8输入NAND，某一个为0就会为1，想测试出来，除非都为1的向量才能测试出。另一方面，有的组合逻辑的变换是有顺序的，比如状态机跳转，如果向量的变化不符合状态机跳转条件，有的状态就可能一直都无法进行测试。解决方法就是使用更长的LFSR生成测试向量，或者是人工干预的方法输入向量。
四、PSA
再接着，PSA的出现是为了减少进行的比较的次数，只需比较最后一次的和就可以（后叙）。
PSA is most often used as a parallel-to-serial compression circuit, the PSA is nothing more than an LFSR with exclusive-OR gates between the shift register elements.
As each pattern is applied to the ASIC by the LFSR connected to the ASIC inputs, the output state of the ASIC is read into the PSA. As each new pattern is applied, the PSA will perform an exclusive-OR of the last pattern’s outputs with the current pattern’s output to create a new value in the PSA. This, conceptually, is very similar to a calculator adding a series of numbers. For example, if adding 2 + 3 + 6 + 9 + 1 + 1 using a calculator, first add the first state, 2, to the second state, 3, to get 5. Then add the new state, 6, to the old state, 5, to get the new result 11, etc. Instead of using addition, the PSA performs an exclusive-OR of the series of 1s and 0s together to get the new result.
同时PSA也带来了aliasing出现的可能（当2个或者更多的error出现，同时互补，不影响输出结果的时候）。减小aliasing的方法是，使用更长的PSA，或者频繁的读出PSA的signature值进行比较，或者监视PSA的MSB。
五、summary
最后总结一下。
The LFSR is a shift register that has some of its outputs together in exclusive-OR configurations to form a feedback path. LFSRs are frequently used as pseudorandom pattern generators to generate a random number of 1s and 0s. Each output of the LFSR is multiplexed with an ASIC input and, when the device is placed in the LFSR (test) mode, the random, high-toggle-rate patterns produced are extremely good for generating high-fault coverage. To minimize the number of results that need to be compared to expected results, a PSA is used. The PSA compresses multiple parallel patterns into a single pattern signature that is compared to the expected value. If the signatures match, it is assumed that the ASIC passed the test vectors applied and there are no manufacturing defects.
