memory addressing

1 Memory Address:

　　a. Logical address  

　　　　consists of a segment(16bits) and an offset(32bits)

　　b.Linear address(virtual address)

　　　　A single 32-bit unsigned integer that can be used to address up to 4GB(4,294,967,296): from 0x00000000 to 0xffffffff

 

　　c. Physical address:

　　　　Used to address memory cells in memory chips. 32-bit or 36-bit unsigned integer

 

MMU: Memory Management Unit

 

2 Segmentation in Hardware

 

Segment Selectors and Segmentation Registers

　　　　A logical address consists of two parts: segment identifier and an offset

　　　　identifier : 16-bit field (called Segment Selector)

　　　　　　　　0-1 bits : RPL 

　　　　　　　　2 bit: TI　　(table index)

　　　　　　　　3-15 bits: index 　　# Identifies the Segment Descriptor entry 　　　　　　　　　　　　　　　　　　　contained in the GDT or in the LDT

　　　　Segment selectors : 　cs ss ds es fs gs

　　　　　　cs ds ss: code segment / data segment / stack segment

　　　　　　the others are called general segment registers

 

　　　　offset: 32-bit field

Segment Descriptors

　　Each segment is represented by an 8-byte Segment Descriptor and are stored

　　either in the Global Descriptor Table(GDT) or in Local Descriptor Table(LDT)

 

　　The address and size of the GDT in main memory are contained in the gdtr 

　　control register, while that of LDT are in ldtr control register.

 

　　There are several types of segments and thus several types of Segment Desciptors.

　　# Code Segment Descriptor

　　# Data Segment Descriptor

　　# Task State Segment Descriptor(TSSD)　　

　　# Local Descriptor Table Descriptor(LDTD)

Fast Access to Segment Descriptors

　　　six nonprogrammable registers contains Segment Descriptor 　

　　　　GDT can contain 8,191(i.e, 2¹³-1)

Segmentation Unit

　　do:

　　# Examines the TI field of Segment Selector to determine GDT or LDT

　　# Computes the address of the Segment Descriptor:

　　　　index field of Segment Selector times 8 and add to the content of 

　　　　gdtr or ldtr register.

　　# Add the offset to the Base field of the Segment Descriptor, thus obtaining

　　　the linear address.

 

3 Segmentation in Linux

　　In fact, segmentation and paging are somewhat redundant, because both can

　　be used to separate the physical address spaces of processes.

　　segmentation can assign a different linear address space to each process,

　　 while paging can map the same linear address space into different physical 　　       address spaces. Linux prefers paging to segmentation

 

　　All Linux processes running in User Mode use user code segment and user data

　　segment. And running in Kernel Mode use kernel code segment and kernel data

　　segment.

 

　　Segment Selectors are defined by the macros _ _USER_CS,

　　_ _USER_DS, _ _KERNEL_CS, and _ _KERNEL_DS,

　　

　　All processes, either in User Mode or in Kernel Mode use the same logical

　　addresses because that the linear address all start at 0(0x00000000) and

　　reach at 0xffffffff(2³²-1)　　

 

 

The Linux GDT

　　 In a multprocessor system, every CPU has a GDT. All GDT are stored in

　　cpu_gdt_table array, while the addresses and sizes of the GDTs(used when

　　initializing the gdtr register) are stored in the cpu_gdt_descr array.

 

　　Each GDT includes 18 segment descriptors and 14 null, unused or reserved

　　entries:

　　　　# Four user and kernel code and data segments

　　　　# A Task State Segment(TSS) stored in init_tss array, the Base field of 

　　　　　the TSS descriptor for the nth CPU points to the nth component of the

　　　　　init_tss array.

　　　　# A segment including the default Local Descriptor Table(LDT), usually

　　　　　shared by all processes

　　　　# Three Thread-Local Storage(TLS) segments. it allows multitreaded 

　　　　　applications to make use of up to three segments containig data local

　　　　　to each thread by using set_thread_area() and get_thread_area() .

　　　　 # Three segments relates to Advanced Power Managment(APM) for BIOS

　　　　　  code 

　　　　 # Five segments related to Plug and Play(PnP) BIOS services.

　　　　 # A special TSS segment used by the kernel to handle "Double fault" 　　　　　  exceptions

　　There is a copy of GDT for each processor in the system.

 

The linux LDTs

　　Kernel defines a default LDT(stored in the dsfault_ldt array) to be shared by 　　       most processor.

　　In some cases,  processes may set up their own LDT by modify_ldt() system call

 

4 Paging in Hardware

　　The paging unit translates linear addresses into physical ones. One key task in

　　the unit is to check the requestd access type against the access rights of the

　　linear address.

　　linear addresses are grouped in fixed-length intervals called pages.

　　The data structures that map linear to physical addresses are called page tables

　　they are stored in main memory and must be properly initalized by the kernel 

　　before enabling the paging unit.

 

　　Staring with the 80386, all 80x86 processors support paging; it is enabled by

　　setting the PG flag of a control register named cr0. When PG = 0, linear address

　　is interpreted as physical address.

  Regular Paging

　　　　The 32 bits of a linear address are divided into three fields:

　　　　　　Directory　　the most significant 10 bits

　　　　　　Table　　　　the intermediate 10 bits

　　　　　　Offset　　　　the least significant 12 bits

　　The physical address of the Page Directory in use is stored in a control

　　register named cr3.