折腾了很久 终于解决了 从SDRAM中运行APP程序。
说明：LPC1788 本身有512K的flash和96K的RAM。支持TFT和SDRAM 这算是跟别家cortex-M3架构MCU相比较的一个亮点。
我这个项目需要使用GUI，NXP有免费的emwin库，这也是一个极大的便利。
我这个项目显示图形比较多，没有配置SD卡或NorFlash，硬件的大致结构式 LPC1788+NandFlash(4M)+SDRAM(16M)+4.3寸TFT。
运行过程中显示的图片比较多，客户方不想把图形以及字库文件存在NandFlash中，只有通过转换成C的方式编译在一起，Oh my god! 固件超大，远远超过512K。
我一开始以为 LPC1788 应该会跟STM32F103ZE这个片子一样很容易就可以实现SDRAM中运行，没想到根本不行。NXP的官方资料也比较少，求人不如求己，还是自己琢磨吧。
LPC1788 支持MPU，所以一开始我的程序装载到SDRAM中无法运行 也是因为MPU的缘故。知道了原因就近似等于找到了解决办法。
google了很久终于琢磨出来了，需要在MPU中配置SDRAM，才可以运行程序的。
我把其中的代码贴上来吧，有兴趣的可以看看。
#include "core_cm3.h"
#include <stdint.h>
#include <string.h>
//运行指定地址的程序
void JUMP_TO_APP(unsigned long address)
{
__ASM("LDR SP, [R0] ;Load new stack pointer address");
__ASM("LDR PC, [R0, #4] ;Load new program counter address");
}
//从指定了NandFlash地址 复制数据到SDRAM 并运行SDRAM程序
void board_jump_to_app(void)
{
//关闭全部中断
NVIC_DeInit();
//Copy target firmware to SDRAM
memcpy((void *)SDRAM_BASE_ADDR,(void *)NOR_FLASH_BASE,NOR_FLASH_SIZE);
__set_MSP(SDRAM_BASE_ADDR);
JUMP_TO_APP(SDRAM_BASE_ADDR);
}
//判断 NandFlash中程序的有效性。LPC1788 会在0x1C偏移处设置校验码，
//return 1-> OK ,others is error
uint8_t app_checksum_is_correct(void)
{
int i;
uint32_t cksum, *buff;
buff = (uint32_t *)NOR_FLASH_BASE;
//判断App程序的第一个跳转指令地址 是否是SDRAM的高位地址
if((buff[1] & SDRAM_BASE_ADDR) != SDRAM_BASE_ADDR)
return 0;
//以下是校验码算法，各位自己琢磨
cksum = 0;
for (i = 0; i < 7; ++i) {
cksum += buff[i];
}
cksum = (0xFFFFFFFF - cksum + 1);
//判断校验码是否符合要求，返回1 表示OK
return ((cksum == buff[7]) && (buff[7] != 0));
}
/**********************************************************************/
/* MPU 设置 */
/**********************************************************************/
/* Region size definitions */
#define MPU_REGION_SIZE_32B 0x04
#define MPU_REGION_SIZE_64B 0x05
#define MPU_REGION_SIZE_128B 0x06
#define MPU_REGION_SIZE_256B 0x07
#define MPU_REGION_SIZE_512B 0x08
#define MPU_REGION_SIZE_1KB 0x09
#define MPU_REGION_SIZE_2KB 0x0A
#define MPU_REGION_SIZE_4KB 0x0B
#define MPU_REGION_SIZE_8KB 0x0C
#define MPU_REGION_SIZE_16KB 0x0D
#define MPU_REGION_SIZE_32KB 0x0E
#define MPU_REGION_SIZE_64KB 0x0F
#define MPU_REGION_SIZE_128KB 0x10
#define MPU_REGION_SIZE_256KB 0x11
#define MPU_REGION_SIZE_512KB 0x12
#define MPU_REGION_SIZE_1MB 0x13
#define MPU_REGION_SIZE_2MB 0x14
#define MPU_REGION_SIZE_4MB 0x15
#define MPU_REGION_SIZE_8MB 0x16
#define MPU_REGION_SIZE_16MB 0x17
#define MPU_REGION_SIZE_32MB 0x18
#define MPU_REGION_SIZE_64MB 0x19
#define MPU_REGION_SIZE_128MB 0x1A
#define MPU_REGION_SIZE_256MB 0x1B
#define MPU_REGION_SIZE_512MB 0x1C
#define MPU_REGION_SIZE_1GB 0x1D
#define MPU_REGION_SIZE_2GB 0x1E
#define MPU_REGION_SIZE_4GB 0x1F
/* Access permission definitions */
#define MPU_NO_ACCESS 0x00
#define MPU_PRIVILEGED_ACESS_USER_NO_ACCESS 0x01
#define MPU_PRIVILEGED_RW_USER_READ_ONLY 0x02
#define MPU_FULL_ACCESS 0x03
#define MPU_UNPREDICTABLE 0x04
#define MPU_PRIVILEGED_READ_ONLY_USER_NO_ACCESS 0x05
#define MPU_READ_ONLY 0x06
/* RASR bit definitions */
#define MPU_RASR_REGION_SIZE(n) ((uint32_t)(n<<1))
#define MPU_RASR_ACCESS_PERMISSION(n) ((uint32_t)(n<<24))
#define MPU_REGION_ENABLE ((uint32_t)(1<<0))
void board_mpu_init(void)
{
/* - Region 0: 0x00000000 - 0x0007FFFF --- on-chip non-volatile memory
* + Size: 512kB
* + Acess permission: full access
*/
MPU->RNR = 0;//indicate MPU region 0
MPU->RBAR = 0x00000000; // update the base address for the region 0
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS) //full access
|MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_512KB) //512Kb size
|MPU_REGION_ENABLE; //region enable
/* - Region 1: 0x10000000 - 0x1000FFFF --- on-chip SRAM
* + Size: 64kB
* + Access permission: full access
*/
MPU->RNR = 1;
MPU->RBAR = 0x10000000; // update the base address for the region 1
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
|MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_64KB)
|MPU_REGION_ENABLE;
/* - Region 2: 0x40000000 - 0x400FFFFF --- APB peripheral
* + Size: 1MB
* + Access permission: full access
*/
MPU->RNR = 2;
MPU->RBAR = 0x40000000; // update the base address for the region 2
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
|MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_1MB)
|MPU_REGION_ENABLE;
/* - Region 3: 0x20080000 - 0x200BFFFF --- AHB peripheral
* + Size: 256KB
* + AP=b011: full access
*/
MPU->RNR = 3;
MPU->RBAR = 0x20080000; // update the base address for the region 3
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
|MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_256KB)
|MPU_REGION_ENABLE;
/* - Region 4: 0xE0000000 - 0xE00FFFFF --- System control
* + Size: 1MB
* + Access permission: full access
*/
MPU->RNR = 4;
MPU->RBAR = 0xE0000000; // update the base address for the region 4
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
|MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_1MB)
|MPU_REGION_ENABLE;
/* - Region 5:0x20000000 - 0x20007FFF --- on chip SRAM
* + Size: 32kB
* + Access permission: full access
*/
MPU->RNR = 5;
MPU->RBAR = 0x20000000; // update the base address for the region 5
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
|MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_32KB)
|MPU_REGION_ENABLE;
/* - Region 6:0xA0000000 - 0xA1000000 --- NorFlash
* + Size: 16MB
* + Access permission: full access
*/
MPU->RNR = 6;
MPU->RBAR = 0x90000000; // update the base address for the region 5
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
|MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_16MB)
|MPU_REGION_ENABLE;
/* - Region 6:0xA0000000 - 0xA1000000 --- Ext SRAM
* + Size: 16MB
* + Access permission: full access
*/
MPU->RNR = 7;
MPU->RBAR = 0xA0000000; // update the base address for the region 5
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
|MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_16MB)
|MPU_REGION_ENABLE;
SCB->SHCSR |=(1<<16); //Enable Memory management fault
MPU->CTRL =(1<<0); //Enable the MPU
//// _DBG_("Setup MPU: \n\r"
//// "This provide 6 regions: \n\r"
//// "Region 0 - Privileged code: 0x00000000 - 0x0007FFFF(512kB)\n\r"
//// "Region 1 - Privileged data: 0x10000000 - 0x1000FFFF(64kB)\n\r"
//// "Region 2 - APB Peripheral: 0x40000000 - 0x400FFFFF(1MB)\n\r"
//// "Region 3 - AHB peripheral: 0x20080000 - 0x200BFFFF(256KB)\n\r"
//// "Region 4 - System control: 0xE0000000 - 0xE00FFFFF(1MB)\n\r"
//// "Region 5 - On-chip SRAM: 0x20000000 - 0x20007FFF(32kB)\n\r"
//// "Region 6 - Ext SRAM 0xA0000000 - 0xA1000000(16MB)\n\r");
//
}
通过 执行board_mpu_init() 函数以后，NandFlash 和 SDRAM中都可以直接运行程序。但是NandFlash中运行简直是太慢了，我受不了。
转载http://www.amobbs.com/thread-5579116-1-1.html
