摘要: http://vhdlguru.blogspot.com/2010/04/difference-between-risingedgeclk-and.htmlrising_edge 是非常严格的上升沿,必须从0到1 , (clk'event and clk='1')可以从X到1查看rising_edge原型 FUNCTION rising_edge (SIGNAL s : std_ulogic) RETURN BOOLEAN IS BEGIN RETURN (s'EVENT AND (To_X01(s) = '1') AND ... 阅读全文
posted @ 2013-04-16 20:29 mipscpu 阅读(8626) 评论(0) 推荐(0) 编辑