DDD
|
VeriSilicon Vivante CC8x00 GPGPU @TSMC7FF, 6Track |
CC8400 |
CC8800 |
|
API Support |
OpenCL3.0 |
OpenCL3.0 |
|
Shader cores (vec1 equivalent shader) |
256 |
512 |
|
FP32/16 Operations per Cycle |
512/1024 |
1024/2048 |
|
GFLOPS (FP32) |
768 |
1536 |
|
GFLOPS (FP16) |
1536 |
3072 |
|
Achievable Clock Speed (GHz) |
1.5 |
1.5 |
|
Synthesis Logic Gates (MGates)① |
77.74 |
168.5 |
|
Memories Bits (KBytes) |
1280.3 |
2595.6 |
|
Total Synthesis Area (mm2) |
5.35 |
11.33 |
|
Projected Silicon Area (mm2)② |
8.46 |
18.00 |
|
Leakage Power (mW) (TT/0.75V/25℃) |
11.8 |
25.4 |
|
Average Dynamic Power (mW)@100MHz (TT/0.75V/25℃) ③ |
167.8 |
335.7 |
|
VeriSilicon Vivante CC8x00 GPGPU @TSMC7FF, 6Track |
CC8400-MP2 |
CC8400-MP4 |
CC8800-MP2 |
CC8800-MP4 |
|
API Support |
OpenCL3.0 |
OpenCL3.0 |
OpenCL3.0 |
OpenCL3.0 |
|
Shader cores (vec1 equivalent shader) |
512 |
1024 |
1024 |
2048 |
|
FP32/16 Operations per Cycle |
1024/2048 |
2048/4096 |
2048/4096 |
4096/8192 |
|
GFLOPS (FP32) |
1536 |
3072 |
3072 |
6144 |
|
GFLOPS (FP16) |
3072 |
6144 |
6144 |
12288 |
|
Achievable Clock Speed (GHz) |
1.5 |
1.5 |
1.5 |
1.5 |
|
Synthesis Logic Gates (MGates)① |
155.4 |
310.9 |
337.1 |
674.0 |
|
Memories Bits (KBytes) |
2491.6 |
4983.3 |
5191.3 |
10382.5 |
|
Total Synthesis Area (mm2) |
10.69 |
21.38 |
22.67 |
45.33 |
|
Projected Silicon Area (mm2)② |
16.91 |
33.81 |
36.02 |
72.03 |
|
Leakage Power (mW) (TT/0.75V/25℃) |
23.7 |
47.3 |
50.8 |
101.5 |
|
Average Dynamic Power (mW)@100MHz (TT/0.75V/25℃) ③ |
335.7 |
671.3 |
671.3 |
1342.7 |
