（笔记）构建基于aemb的sopc系统（一）--硬件相关

The world's smallest and fastest multi-threaded 32-bit RISC microprocessor core family！

AEMB是高速，开源，嵌入式微处理器核的一个系列。它有几种版本：single-threaded核，double-threaded核和quad-threaded 核。

AEMB的特性

Ø         Small and fast

Ø         Multi-threaded

Ø         Open-source

Ø         Wishbone-compliant

Ø         Parameterisable

Ø         Mature

关于AEMB Architecture 需注意：While being C/C++ compatible, there are several different versions of the core with different architectures, not just different EDK compatibilities. When deciding which version to use for your application, you should attempt to use the latest core as the older ones are generally not supported.

 

阅读AEMB的老文档可以访问http://www.aeste.my/node/n，n=1,11~23。可以看到不少有用的东西。

 

获得AEMB的编译工具链和RTL源码。

在AEMB的网站上找不到编译工具链的源码了，在opencores上mb-gcc的链接也无效了，不过在AEMB网站上提供了已编译好的CROSS-COMPILERS，并且提醒到：they were hard to locate elsewhere. 但在中国这个大局域网里直接下载是下不到的，通过代理吧。

 

后记：可以到Xilinx网页上用注册的用户下载编译源码。可以参考How to build a GCC toolchain for the AEMB，编译工具链（较老了2007-12-06），有时间做一下。参考如何为 aeMB RISC processor 编译固件？（可能较新）。

 

RTL的源码在opencores网站上就可以找到aemb_latest.tar.gz。在/sw/gccrom文件中给出了一个编译代码的样本脚本。编译一个基本的程序，只需用到：

$ mb-gcc -g -Os -mxl-barrel-shift -mno-xl-soft-mul -specs=aemb.specs -o rom.elf

这句代码将产生rom.elf文件，它可以转存（dump）成适用于仿真（simulation），烧写存储器（flashing into memory）和集成到比特流（integration into configuration）的各种格式。编译的过程中有很多可以配置的命令行选项。

Ø          -mno-xl-soft-mul should be specified if the AEMB is configured with a hardware multiplier.

Ø          -mxl-barrel-shift should be specified if the AEMB is configured with a hardware barrel shifter.

Ø          -specs=aemb.specs specifies the custom specs file to use, which is customised below.

创建specs文件，可以用以下的命令

$ mb-gcc -dumpspecs > aemb.specs

然后再根据自己的需求修改aemb.specs文件。

 

读一下aemb的blog http://blog.aeste.my/

整数流水线

Ø         Instruction Fetch (IF) The instruction address is presented to the instruction cache and the pipeline is stalled until the request is fulfilled by the instruction cache.

Ø         Operand Fetch (OF) The operands are fetched from the register file.

Ø         Instruction Execution (EX) The instruction is decoded and executed by the appropriate execution unit.

Ø         Memory Access (MA) Any external data access is performed in this stage, which includes data memory access and accelerator bus access. There is no built in data cache.

Ø         Write Back (WB) All integer data processed is written back into the register file in this stage. Branch instructions will also write to the programme counter at this stage.

Architecture Summary（EDK62）

Ø         5-stage integer execution pipeline.

Ø         Sixty four 32-bit general purpose registers.

Ø         32-bit instruction length with 2 addressing modes and 3 operands.

Ø         Three 32-bit Wishbone buses - instruction, data, accelerator.

Ø         Integrated FPGA oriented instruction cache.

Ø         Multi-stage hardware multiplier.

Ø         Multi-stage barrel-shifter.

Ø         Single issue pipeline.

Ø         Dual hardware threads.

 

Eyecandy on a Chip

这是个什么东西？milkymist，好像是有关视频渲染的一个aemb的应用。下载源码

$ git clone http://github.com/lekernel/milkymist.git

这个工程不小。有64M之大。是ISE的工程。Xilinx的开发板，芯片Virtex-4。不懂。演示视频mm03_demo.mp4非常炫。这小小的aemb还能做这等事？

后记：在milkymist的blog中发现了这么一句：Early versions of the system-on-chip used AEMB instead of Mico32. It has been replaced because of performance and software support complexity reasons.

可在AEMB的网站上还贴着：As you can see from the system block diagram on the right, the powerful system-on-chip uses the AEMB as its core processor.其实人家已经不用了。

不过这个milkymist可真是个非常不错的工程。

 

又一个aemb的工程OpenPattern OMRP 不可访问。Site under maintenance 

后记：终于找到了一个可以得到的用到了aemb的参考工程：USRP and USRP2

git clone git://git.ettus.com/ettus/fpga.git

 

被下一代的GNU Radio工程选为中央处理器，GNU Radio 是免费软件开发套件，提供了信号实时处理的软件和低成本的软件无线电硬件。被广泛应用于业余爱好者，学术研究以及商业环境中去支持无线通讯的学术研究以便去真实实现无线电系统。

 

aemb源码中附带的《AEMB 32-bit Microprocessor Core Datasheet》内容比较少，且较老了吧。

The core ports are broken into four groups: Instruction Bus, Data Bus, FSL Bus and System signals.

External signal names and descriptions.

顶层文件说是EDK32，其实在最新版的里的顶层文件有aemb_core，aemb2_edk62，aemb2_edk63。

 

复位操作

Aemb核的复位信号是SYS_RST_I。在复位时，所有核的内部寄存器，被置位成它们的复位值，所有的中断被MSR_IE寄存器的值禁止。复位后，处理器从0x00000000开始取指。

 

中断操作（Interrupt Operation）

Aemb核支持SYS_INT_I信号上升沿出发的复位信号，中断反应时间3~5个时钟周期。Interrupts will not trigger between non-atomic instructions such as IMMI.