IMXRT 1060 LPI2C总结
1. However, the LPI2C will no longer stall the I2C bus waiting for the transmit or receive FIFO, and after the transmit FIFO is empty, the LPI2C generates a STOP condition automatically.
LPI2C不会因为等待 发送/接收 FIFO而让 I2C 总线搁置，并且当 发送 FIFO 为空时， LPI2C 将会自动产生 停止位。
2. Standard, Fast, Fast+ and Ultra Fast modes are supported
支持 Standard, Fast, Fast+ , Ultra Fast 模式。（High Speed模式也支持，但是感觉有点特殊啊）
3. Multi-master support, including synchronization and arbitration.
支持多主机，包括同步和仲裁。
4. When node detection is used on the SCL line, it is called clock stretching, and clock stretching is used as a I2C flow control mechanism.
当 节点检测 用在 SCL 线上时，这个称为 时钟拉伸。时钟拉伸 用作 I2C 流控机制。
5. When node detection is used on the SDA line, it is called arbitration, and arbitration ensures that there is only one I2C node transmitter at a time.
当 节点检测 用在 SDA 线上时，这个称为 仲裁，仲裁保证在一个时刻内只有 一个 I2C 节点 传输。
6. Command FIFO will wait for idle I2C bus before initiating transfer
命令FIFO 在发起传输前， 等待 I2C 总线空闲。
7. Command FIFO can initiate (repeated) START and STOP conditions and one or more master-receiver transfers.
命令 FIFO 可以发起 起始位 ， 停止位 或 多主从 传输。
8. The transmit FIFO stores command data to initiate the various I2C operations.
发送 FIFO 存储着 命令 数据，用于初始化 I2C 操作。
9. The LPI2C master automatically transmits a NACK on the last byte of a receive data command unless the next command in the FIFO is also a receive data command.
如果 FIFO 中的 下一条命令 不是 接收数据 命令，那么 LPI2C 主机 会 在最后一个 接收数据 命令字节，自动发送 NACK。
10. A NACK is also automatically transmitted if the transmit FIFO is empty when a receive data command completes.
如果当 接收数据 命令完成， 发送FIFO 是空，那么 NACK 会 自动被 发送。
11. The LPI2C master supports 10-bit addressing through a (repeated) START condition, followed by a transmit data byte containing the second address byte, followed by any number of data bytes with the master-transmit data.
此句不太会翻译。
12. A START or Repeated START condition that is expecting a NACK (for example,HSmode master code) must be followed by a STOP or (repeated) START condition.
期望 NACK 的 起始位 或者 重复起始位 ，其后必须是 停止位 或者 （重复）停止位。
13. The I2C bus is no longer considered idle if either SCL or SDA are low
如果 SCL 或者 SDA 是低，那么 I2C 总线将不再视为 空闲。
14. I2C bus becomes idle if a STOP condition is detected or if a bus idle timeout is detected
如果 检测到 停止位事件 或者 总线空闲超时事件，I2C总线将会变成 空闲态。
15. After the I2C bus is idle, the transmit FIFO is not empty, and the host request is either asserted or disabled, then the LPI2C master initiates a transfer on the I2C bus.
在 I2C 总线空闲后，如果 发送 FIFO 非空，不管 主机请求 生效还是不生效，LPI2C主机 将在I2C总线上 发起传输。
16. Receive data can also be configured to discard receive data instead of storing in the receive FIFO
接收数据 可以被丢弃，而不是存储在 接收FIFO。
17. Receive data supports a receive data match function that can match received data against one of two bytes or against a masked data byte.
接收数据 支持 接收数据匹配 功能，这个功能可以 匹配 2个接收字节中的 1个字节，或者可以 屏蔽 一个数据字节。
18. The data match function can also be configured to compare only the first one or two received data words since the last (repeated) START condition.
数据匹配 功能 同样可以被配置为 比较最后一个（重复）起始位 之后 的 第一个 字 数据 或者 前两个 字 数据。
19. Parameters are configured separately for high speed mode (Master Clock Configuration 1 (MCCR1)) and other modes (Master Clock Configuration 0 (MCCR0)).
可以通过 MCCR1 来配置 高速模式 的参数，可以通过 MCCR0 来配置 其他模式 的参数。
20. This allows the high speed mode master code to be sent using the regular timing parameters, and then switch to the high speed mode timing (following a repeated START) until the next STOP condition.
此句没懂
21.
