Interleaving ADC spur analysis
1 clc; 2 clear all; 3 close all; 4 format long; 5 6 %% 7 %interleaving ADC spur analysis 8 % Leon Li, leon.a.li@ericsson.com 9 10 %% 11 % signal parameters 12 fs = 1966.08e6;% sampling frequency 13 f0=(100+rand(1)*50)*1e6;% signal frequency,random 100M-150M 14 N= 1024; % sampling data length 15 T=N/fs;%sampling time length 16 t=linspace(0,T-1/fs,N)';%sampling time 17 Amp = -10;% signal power, dBm 18 Amp_vp = sqrt(10^((Amp-30)/10)*100);% peak voltage 19 s1=Amp_vp*cos(2*pi*f0*t);%signal generate 20 reply = input(['This is a script to analysis factors that caused interleaving spur:\n'... 21 'press 1 for DC offset analysis' '\n'... 22 'press 2 for gain error analysis' '\n'... 23 'press 3 for phase error analysis' '\n'... 24 'press 4 for all analysis' '\n'... 25 ]); 26 if(reply ~= 1 && reply ~=2 && reply ~=3 && reply ~=4) 27 error('you input a wrong number, and it should be 1,2,3 or 4') 28 end 29 if (reply == 1 || reply ==4) 30 %dc_offset = input('please input dc offset'); 31 Amp_DC_offset2= Amp_vp*0.03;% DC offset 32 Amp_DC_offset3= Amp_vp*0.07;% DC offset 33 Amp_DC_offset4= Amp_vp*0.1;% DC offset 34 else 35 Amp_DC_offset2= 0.0;% DC offset 36 Amp_DC_offset3= 0.0;% DC offset 37 Amp_DC_offset4= 0.0;% DC offset 38 end 39 40 if (reply == 3 || reply ==4) 41 phase_error2 = 1; 42 phase_error3 = 3; 43 phase_error4 = 5; 44 else 45 phase_error2 = 0; 46 phase_error3 = 0; 47 phase_error4 = 0; 48 end 49 if (reply == 2 || reply ==4) 50 Amp_gain_error2= Amp_vp*1.02;%gain error 51 Amp_gain_error3= Amp_vp*1.03;%gain error 52 Amp_gain_error4= Amp_vp*1.05;%gain error 53 else 54 Amp_gain_error2= Amp_vp;%gain error 55 Amp_gain_error3= Amp_vp;%gain error 56 Amp_gain_error4= Amp_vp;%gain error 57 end 58 59 s2=Amp_gain_error2*cos(2*pi*f0*t+phase_error2)+Amp_DC_offset2;%signal generate 60 s3=Amp_gain_error3*cos(2*pi*f0*t+phase_error3)+Amp_DC_offset3;%signal generate 61 s4=Amp_gain_error4*cos(2*pi*f0*t+phase_error4)+Amp_DC_offset4;%signal generate 62 s= reshape([s1(1:4:end), s2(2:4:end), s3(3:4:end), s4(4:4:end)]',N,1);% simulate interleaving ADC 63 SNR = 60; % signal to noise ratio 64 s1 = awgn(s1,SNR );% add awgn 65 s= awgn(s,SNR);% add awgn 66 % figure; 67 % plot(t,s); 68 % 69 %% 70 % spectrum 71 w = window(@blackman,N);% blackman window 72 s_w=s.*w;% add window 73 figure; 74 plot(t,s_w,'r-.',t,s1.*w,'k'); 75 title('sampling data, one converter vs four converters'); 76 legend('four converters','one converter'); 77 xlabel('time: S'); 78 ylabel('amplitude: V'); 79 spectrum = 10*log10((abs(fft(s_w,N))/2).^2/N);% calculate power spectrum 80 spectrum2 = 10*log10((abs(fft(s1.*w,N))/2).^2/N);% calculate power spectrum 81 freq= linspace(0,fs-fs/N,N); 82 figure; 83 plot(freq(1:N/2),spectrum(1:N/2),'b-.',freq(1:N/2),spectrum2(1:N/2),'k'); 84 title('spectrum, one converter vs four converters'); 85 legend('four converters','one converter') 86 xlabel('frequency: Hz'); 87 ylabel('amplitude: dBm');
OPTIMISM, PASSION & HARDWORK
