【原创】The solutional manual of the Verilog HDL: A Guide to Digital Design and Synthesis (2nd)—ch07-III
摘要：
12. Using a case statement, design an 8-function ALU that takes 4-bit inputs a and b and a 3-bit input signal select, and gives a 5-bit output out. The ALU implements the following functions based on a 3-bit input signal select. Ignore any overflow or underflow bits. Select SignalFunction3’b000Out=a 阅读全文
posted @ 2011-03-18 16:08 yf.x 阅读(11141) 评论(0) 推荐(0) 编辑
