Altera 建议的使用preset的方法
摘要：
dffeveri.vmodule dffeveri (q, d, clk, ena, rsn, prn);// port declarationinput d, clk, ena, rsn, prn;output q;reg q;always @ (posedge clk or negedge rsn or negedge prn) begin//asynchronous active-low preset if (~prn) begin if (rsn) q = 1'b1; else q... 阅读全文
posted @ 2012-08-10 16:39 freshair_cn 阅读(378) 评论(0) 推荐(0) 编辑
