摘要: length0x0030 (Hex)checksum0x0000 (Hex)boot_mode0x001E (Hex)portNum0x0000 (Hex)swPllCfg_msw0x4014 (Hex)swPllCfg_lsw0x0102 (Hex)options0x0000 (Hex)addressWidth0x0020 (Hex)linkRateMhz0x09C4 (Hex)refClock10kHz0x2710 (Hex)window0Size0x0020 (Hex)window1Size0x0020 (Hex)window2Size0x0020 (Hex)window3Size0x0 阅读全文
posted @ 2012-11-17 19:23 FPGA/DSP 阅读(864) 评论(1) 推荐(0) 编辑