嵌入式系统词汇表


A
ASIC
Application-Specific Integrated Circuit. A piece of custom-designed hardware in a chip.
address bus
A set of electrical lines connected to the processor and all of the peripherals withwhich it communicates. The address bus is used by the processor to select aspecific memory location or register within a particular peripheral. If the address bus contains n electrical lines, the processor can uniquely address up to 2^n such locations.
application software
Describes software modules specific to a particular embedded project. The
application software is unlikely to be reusable across embedded platforms, simply
because each embedded system has a different application.
assembler
A software development tool that translates human-readable assembly language
programs into machine-language instructions that the processor can understand
and execute.
assembly language
A human-readable form of a processor's instruction set. Most processor-specific
functions must be written in assembly language.
B
BSP
See board support package.
binary semaphore
A type of semaphore with just two states. Also called a mutex.
board support package
Part of a software package that is processor or platform-dependent. Typically,
sample source code for the board support package is provided by the package
developer. The sample code must be modified as necessary, compiled, and linked
with the remainder of the software package.
bond-out processor
A special version of a processor that has some of the internal signals brought out
to external pins. A bond-out processor is most often found within an emulator and
is never intended to be used in a production system.
breakpoint
A location in a program at which execution is to be stopped and control of the
processor switched to the debugger. Mechanisms for creating and removing
breakpoints are provided by most debugging tools.
C
CISC
Complex Instruction Set Computer. Describes the architecture of a processor
family. CISC processors generally feature variable-length instructions, multiple
addressing formats, and contain only a small number of general-purpose registers.
Intel's 80x86 family is the quintessential example of CISC. Contrast with RISC.
CPU
Central Processing Unit. The part of a processor that executes instructions.

compiler
A software development tool that translates high-level language programs into the
machine-language instructions that a particular processor can understand and execute.
context
The current state of the processor's registers and flags.
context switch
The process of switching from one task to another in a multitasking operating
system. A context switch involves saving the context of the running task and
restoring the previously-saved context of the other. The piece of code that does
this is necessarily processor-specific.
counting semaphore
A type of semaphore that is used to track multiple resources of the same type. An
attempt to take a counting semaphore is blocked only if all of the available
resources are in use. Contrast with binary semaphore.
critical section
A block of code that must be executed in sequence and without interruption to
guarantee correct operation of the software. See also race condition.
cross-compiler
A compiler that runs on a different platform than the one for which it produces
object code. A cross-compiler runs on a host computer and produces object code
for the target.
D
DMA
Direct Memory Access. A technique for transferring data directly between two
peripherals (usually memory and an I/O device) with only minimal intervention by
the processor. DMA transfers are managed by a third peripheral called a DMA controller.
DRAM
Dynamic Random-Access Memory. A type of RAM that maintains its contents only
as long as the data stored in the device is refreshed at regular intervals.
The refresh cycles are usually performed by a peripheral called a DRAM controller.
DSP
See digital signal processor.
data bus
A set of electrical lines connected to the processor and all of the peripherals with
which it communicates. When the processor wants to read (write) the contents of
a memory location or register within a particular peripheral, it sets the address
bus pins appropriately and receives (transmits) the contents on the data bus.
deadline
The time at which a particular set of computations must be completed. See also
real-time system.
deadlock
An unwanted software situation in which an entire set of tasks is blocked, waiting
for an event that only a task within the same set can cause. If a deadlock occurs,
the only solution is to reset the hardware. However, it is usually possible to
prevent deadlocks altogether by following certain software design practices.

debug monitor
A piece of embedded software that has been designed specifically for use as a
debugging tool. It usually resides in ROM and communicates with a debugger via a
serial port or network connection. The debug monitor provides a set of primitive
commands to view and modify memory locations and registers, create and remove
breakpoints, and execute your program. The debugger combines these primitives
to fulfill higher-level requests like program download and single-step.
debugger
A software development tool used to test and debug embedded software. The
debugger runs on a host computer and connects to the target through a serial port
or network connection. Using a debugger you can download software to the target
for immediate execution. You can also set breakpoints and examine the contents
of specific memory locations and registers.
device driver
A software module that hides the details of a particular peripheral and provides a
high-level programming interface to it.
device programmer
A tool for programming non-volatile memories and other
electrically-programmable devices. Typically, the programmable device is inserted
into a socket on the device programmer and the contents of a memory buffer are
then transferred into it.
digital signal processor
A device that is similar to a microprocessor, except that the internal CPU has been
optimized for use in applications involving discrete-time signal processing. In
addition to standard microprocessor instructions, DSPs usually support a set of
complex instructions to perform common signal-processing computations quickly.
Common DSP families are TI's 320Cxx and Motorola's 5600x series.
E
EEPROM
Electrically Erasable, Programmable Read-Only Memory. (Pronounced
"Double-E"-PROM.) A type of ROM that can be erased electronically.
EPROM
Erasable, Programmable Read-Only Memory. A type of ROM that can be erased by
exposing it to ultraviolet light. Once erased, an EPROM can be reprogrammed with
the help of a device programmer.
embedded system
A combination of computer hardware and software, and perhaps additional
mechanical or other parts, designed to perform a dedicated function. In some
cases, embedded systems are part of a larger system or product, as is the case of
an anti-lock braking system in a car. Contrast with general-purpose computer.
emulator
Short for In-Circuit Emulator (ICE). A debugging tool that takes the place
of-emulates-the processor on your target board. Emulators frequently
incorporate a special "bond-out" version of the target processor that allows
 you to observe and record its internal state as your program is executing.
executable
A file containing object code that is ready for execution on the target. All that
remains is to place the object code into a ROM or download it via a debugging tool.
F
firmware
Embedded software that is stored as object code within a ROM. This name is most
common among the users of digital signal processors.
flash memory
A RAM-ROM hybrid that can be erased and rewritten under software control.
Such devices are divided into blocks, called sectors, that are individually-erasable.
Flash memory is common in systems that require nonvolatile data storage at very
low cost. In some cases, a large flash memory may even be used instead of a disk-drive.
G
general-purpose computer
A combination of computer hardware and software that serves as a
general-purpose computing platform. For example, a personal computer. Contrast
with embedded system.
H
HLL
See high-level language.
heap
An area of memory that is used for dynamic memory allocation. Calls to malloc and
free and the C++ operators new and delete result in run-time manipulation of the heap.
high-level language
A language, such as C or C++, that is processor-independent. When programming in
a high-level language, it is possible to concentrate on algorithms and applications
without worrying about the details of a particular processor.
host
A general-purpose computer that communicates with the target via a serial port or
network connection. This term is usually used to distinguish the computer on which
the debugger is running from the embedded system that is being developed.
I
ICE
In-Circuit Emulator. See emulator.
I/O
Input/Output. The interface between a processor and the world around it. The
simplest examples are switches (inputs) and LEDs (outputs).
I/O device
A piece of hardware that interfaces between the processor and the outside world.
Common examples are switches and LEDs, serial ports, and network controllers.
I/O map
A table or diagram containing the name and address range of each peripheral
addressable by the processor within the I/O space. I/O maps are a helpful aid in
getting to know the target.
I/O space
A special memory region provided by some processors and generally reserved for
the attachment of I/O devices. Memory locations and registers within an I/O
space can be accessed only via special instructions. For example, processors in the
80x86 family have special I/O space instructions called in and out. Contrast with
memory space.
ISR
See interrupt service routine.
instruction pointer
A register in the processor that contains the address of the next instruction to
be executed. Also known as a program counter.
interrupt
An asynchronous electrical signal from a peripheral to the processor. When the
peripheral asserts this signal, we say that an interrupt occurs. When an interrupt
occurs, the current state of the processor is saved and an interrupt service
routine is executed. When the interrupt service routine exits, control of the
processor is returned to whatever part of the software was previously running.
interrupt latency
The amount of time between the assertion of an interrupt and the start of the
associated interrupt service routine.
interrupt service routine
A piece of software executed in response to a particular interrupt.
interrupt type
A unique number associated with each interrupt.
interrupt vector
The address of an interrupt service routine.
interrupt vector table
A table containing interrupt vectors and indexed by interrupt type. This table
contains the processor's mapping between interrupts and interrupt service
routines and must be initialized by the programmer.
intertask communication
A mechanism used by tasks and interrupt service routines to share information
and synchronize their access to shared resources. The most common building
blocks of intertask communication are semaphores and mutexes.
K
kernel
An essential part of any multitasking operating system, the kernel contains just
the scheduler and context-switch routine.
L
linker
A software development tool that accepts one or more object files as input and
outputs a relocatable program. The linker is thus run after all of the source files
have been compiled or assembled.
locator
A software development tool that assigns physical addresses to the relocatable
program produced by the linker. This is the last step in the preparation of
software for execution by an embedded system and the resulting file is called an
executable. In some cases, the locator's function may be hidden within the linker.
logic analyzer
A hardware debugging tool that can be used to capture the logic levels (0 or 1) of
dozens, or even hundreds, of electrical signals in real-time. Logic analyzers can be
quite helpful for debugging hardware problems and complex processor-peripheral
interactions.
M
memory map
A table or diagram containing the name and address range of each peripheral
addressable by the processor within the memory space. Memory maps are a helpful
aid in getting to know the target.
memory-mapped I/O
An increasingly common hardware design methodology in which I/O devices are
placed into the memory space rather than the I/O space. From the processor's
point of view, memory-mapped I/O devices look very much like memory devices.
memory space
A processor's standard address space. Contrast with I/O space.
microcontroller
A microcontroller is very similar to a microprocessor. The main difference is that
a microcontroller is designed specifically for use in embedded systems.
Microcontrollers typically include a CPU, memory (a small amount of RAM and/or
ROM), and other peripherals on the same chip. Common examples are the 8051,
Intel's 80196, and Motorola's 68HCxx series.
microprocessor
A piece of silicon containing a general-purpose CPU. The most common examples
are Intel's 80x86 and Motorola's 680x0 families.
monitor
In the context of this book, a debug monitor. However, there is a second meaning
for this word that is associated with intertask communication. In that context, a
monitor is a language-level synchronization feature.
multiprocessing
The use of more than one processor in a single computer system. So-called
"multiprocessor systems" usually have a common memory space through which the
processors can communicate and share data. In addition, some multiprocessor
systems support parallel processing.
multitasking
The execution of multiple software routines in pseudo-parallel. Each routine
represents a separate "thread of execution" and is referred to as a task. The
operating system is responsible for simulating parallelism by parceling out the
processor's time.
mutex
A data structure for mutual exclusion, also known as a binary semaphore. A mutex
is basically just a multitasking-aware binary flag that can be used to synchronize
the activities of multiple tasks. As such, it can be used to protect critical sections
of the code from interruption and shared resources from simultaneous use.
mutual exclusion
A guarantee of exclusive access to a shared resource. In embedded systems, the
shared resource is typically a block of memory, a global variable, or a set of
registers. Mutual exclusion can be achieved with the use of a semaphore or mutex.
N
NVRAM
Non-Volatile Random-Access Memory. A type of RAM that retains its data even
when the system is powered down. NVRAM frequently consists of an SRAM and a
long-life battery.
O
OTP
See one-time programmable.
object code
A set of processor-readable opcodes and data. The output of compilers,
assemblers, linkers, and locators are files containing object code.
object file
A file containing object code. The output of a compiler or assembler.
one-time programmable
Any programmable device, like a PROM, that can be programmed just once by the
end user. However, this term is used almost exclusively to refer to
microcontrollers with on-chip PROM.
opcode
A sequence of bits that is recognized by the processor as one of the instructions
in its instruction set.
operating system
A piece of software that makes multitasking possible. An operating system
typically consists of a set of function calls, or software interrupts, and a periodic
clock tick. The operating system is responsible for deciding which task should be
using the processor at a given time and for controlling access to shared resources.
oscilloscope
A hardware debugging tool that allows you to view the voltage on one or more
electrical lines. For example, you might use an oscilloscope to determine if a
particular interrupt is currently asserted.
P
PROM
Programmable Read-Only Memory. A type of ROM that can be written
(programmed) with a device programmer. These memory devices can be
programmed only once, so they are sometimes referred to as write-once or
one-time programmable devices.
parallel processing
The ability to apply two or more processors to a single computation.
peripheral
A piece of hardware other than the processor, usually memory or an I/O device.
The peripheral may reside within the same chip as the processor, in which case it
is called an internal peripheral.
physical address
The actual address that is placed on the address bus when accessing a memory
location or register.
preemptive
A scheduler is said to be preemptive if it allows the running task to be suspended
when a higher-priority task becomes ready. Non-preemptive schedulers are easier
to implement but less appropriate for embedded systems.
polling
A method of interfacing with hardware that involves repeatedly reading a status
register until the device has reached the awaited state. Device drivers are either
polling or interrupt-driven, with the latter being more generally preferred.
priority
The relative importance of one task compared to another.
priority inversion
An unwanted software situation in which a high-priority task is delayed while
waiting for access to a shared resource that is not even being used at the time.
For all practical purposes, the priority of this task has been lowered during the
delay period.
process
A word that is often confused with task or thread. The crucial distinction is that
all of the tasks in a system share a common memory space. Processes, on the other
hand, always have their own private memory space. Processes are common in
multi-user systems but are rarely, if ever, found in embedded systems.
processor
A generic term that does not distinguish between microprocessor, microcontroller,
and digital signal processor.
processor family
A set of related processors, usually successive generations from the same
manufacturer. For example, Intel's 80x86 family began with the 8086 and now
includes the 80186, 286, 386, 486, Pentium, and many others. The later models in a
family are typically backwards-compatible with the ones that came before.
processor-independent
A piece of software that is independent of the processor on which it will be run.
Most programs that can be written in a high-level language are
processor-independent. Contrast with processor-specific.
processor-specific
A piece of software that is highly dependent on the processor on which it will be
run. Such code must usually be written in assembly language. Contrast with
processor-independent.
profiler
A software development tool that collects and reports execution statistics for
your programs. These statistics include the number of calls to each subroutine and
the total amount of time spent within each. This data can be used to learn which
subroutines are the most critical and, therefore, demand the greatest code
efficiency.
program counter
See instruction pointer.
R
RAM
Random-Access Memory. A broad classification of memory devices that includes
all devices in which individual memory locations may be read or written as required.
RISC
Reduced Instruction Set Computer. Describes the architecture of a processor
family. RISC processors generally feature fixed-length instructions, a load-store
memory architecture, and a large number of general-purpose registers and/or
register windows. The MIPS processor family is an excellent example. Contrast
with CISC.
ROM
Read-Only Memory. A broad classification of memory devices that includes all
devices in which the individual memory locations may be read, but not written.
ROM emulator
A debugging tool that takes the place of-or emulates-the ROM on your target
board. A ROM emulator acts very much like a debug monitor, except that it
includes its own serial or network connection to the host.
ROM monitor
See debug monitor.
RTOS
Real-Time Operating System. An operating system designed specifically for use in
real-time systems.
race condition
A situation in which the outcome of a program may be affected by the exact order
in which the instructions are executed. Race conditions are only an issue where
interrupts and/or preemption are possible and where critical sections exist.
real-time system
Any computer system, embedded or otherwise, that has deadlines. The following
question can be used to distinguish real-time systems from the rest: "Is a late
answer as bad, or even worse, than a wrong answer?" In other words, what happens
if the computation doesn't finish in time? If nothing bad happens, it's not a
real-time system. If someone dies or the mission fails, it's generally considered
"hard" real-time, which is meant to imply that the system has "hard" deadlines.
Everything in between is "soft" real-time.
recursive
Said of software that calls itself. Recursion should generally be avoided in an
embedded system, since it frequently requires a large stack.
reentrant
Said of software that can be executed multiple times simultaneously. A reentrant
function can be safely called recursively or from multiple tasks. The key to making
code reentrant is to ensure mutual exclusion whenever accessing global variables
or shared registers.
register
A memory location that is part of a processor or an I/O device. In other words,
it's not normal memory. Generally, each bit or set of bits within the register
controls some behavior of the larger device.
relocatable
A file containing object code that is almost ready for execution on the target. The
final step is to use a locator to fix the remaining relocatable addresses within the
code. The result of that process is an executable.
reset address
The address from which the first instruction will be fetched after the processor
is powered on or reset.
reset code
A small piece of code that is placed at the reset address. The reset code is usually
written in assembly language and may simply be the equivalent of "jump to the
startup code."
reset vector
See reset address.
S
SRAM
Static Random-Access Memory. A type of RAM that retains its contents as long as
the system is powered on. Data stored in an SRAM is lost when the system is
powered down or reset.
scheduler
The part of an operating system that decides which task to run next. This decision
is based on the readiness of each task, their relative priorities, and the specific
scheduling algorithm implemented.
semaphore
A data structure that is used for intertask synchronization. Semaphores are
usually provided by the operating system.
simulator
A debugging tool that runs on the host and pretends to be the target processor. A
simulator can be used to test pieces of the software before the embedded
hardware is available. Unfortunately, attempts to simulate interactions with
complex peripherals are often more trouble than they are worth.
software interrupt
An interruption of a program that is initiated by a software instruction. Software
interrupts are commonly used to implement breakpoints and operating system
entry points. Unlike true interrupts, they occur synchronously with respect to
program execution. In other words, software interrupts always occur at the
beginning of an instruction execution cycle. Compare with trap.
stack
An area of memory that contains a last-in-first-out queue of storage for
parameters, automatic variables, return addresses, and other information that
must be maintained across function calls. In multitasking situations, each task
generally has its own stack.
stack frame
An area of the stack associated with a particular function call.
startup code
A piece of assembly language code that prepares the way for software written in a
high-level language. Most C/C++ cross-compilers come with startup code that you
can modify, compile, and link with your embedded programs.
T
target
Another name for the embedded system. This term is usually used during software
development, to distinguish the embedded system from the host with which it
communicates.
task
The central abstraction of an operating system. Each task must maintain its own
copy of the instruction pointer and general-purpose registers. Unlike processes,
tasks share a common memory space and must be careful to avoid overwriting each
other's code and data.
thread
Another name for a task. This name is more common in operating systems that
support processes. A task is simply a thread in a single-process system.
tracepoint
Like a breakpoint except that a counter is incremented rather than stopping the
program. Tracepoints are not supported by all debugging tools.
trap
An interruption of a program that is triggered by the processor's own internal
hardware. For example, the processor might trap if an illegal opcode is found
within the program. Compare with software interrupt.
V
volatile
A value that may change without the intervention of software is said to be volatile.
For example, values within the registers of some I/O devices may change in
response to external events. C's volatile keyword should be used to warn your
compiler about any pointers that point to such registers. This will ensure that the
actual value is reread each time the data is used.
W
watchdog timer
A hardware timer that is periodically reset by software. If the software crashes
or hangs, the watchdog timer will expire, and the entire system will be reset
automatically.

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posted @ 2008-04-23 18:05  fishert  阅读(424)  评论(0编辑  收藏  举报