此贴转自于：http://www.swarthmore.edu/NatSci/echeeve1/Class/e15/DL/e15QuartusWarnings.html
Allowable warnings.
Analysis and Synthesis
Warning: Output pins are stuck at VCC or GND
(Occurs because some values are constant (for example if you want to keep an LED always on or always off).)
Warning: Output port "xxx[2..1]" at yyy.v(1) has no driver
(Occurs because some pins of an output port are not used (for example you declare an register with 4 bits for LED's, but you only use two of the LED's); this can generally be avoided by using consecutive LED's.)
Warning: Ignored assignments for entity "xxx" -- entity does not exist in design
(Occurs because there is no module with the same name as the project name (project name is "xxx").)
Fitter:
Warning: Classic Timing Analyzer will not be available in a future release of the Quartus II software. Use the TimeQuest Timing Analyzer to run timing analysis on your design. Convert all the project settings and the timing constraints to TimeQuest Timing Analyzer equivalents.
(We'll switch to TimeQuest at a later date.)
Warning: Ignored locations or region assignments to the following nodes
(These errors occur because of all the DE2 pins that are in the "E15DE2_IO.qsf" assignments file that we don't use; i.e., switches, LED's...)
Warning: Found (xx) output pins without output pin load capacitance assignment
(To do a strict timing analysis it is necessary to know the capacitance at each pin.)
Warning: Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
(These errors occur because of all the DE2 pins that are in the "E15DE2_IO.qsf" assignments file that we don't use; i.e., switches, LED's ...)
Warning: The Reserve All Unused Pins setting has not been specified, and will default to 'As output driving ground'.
(We don't specify what Quartus should do with unused pins (so it grounds them).)
Timing Analyzer:
Warning: Classic Timing Analyzer will not be available in a future release of the Quartus II software. Use the TimeQuest Timing Analyzer to run timing analysis on your design. Convert all the project settings and the timing constraints to TimeQuest Timing Analyzer equivalents.
(We'll switch to TimeQuest at a later date.)
Warning: Found pins functioning as undefined clocks and/or memory enables
(To do a strict timing analysis you should set clock properties (in "Assignments") such as rise time, fall time...)
