uboot中log处理
位图或logo和开机显示画面,是两个完全不同的东西。
logo显示uboot相关信息,如版本号等。
开机画面是用户下载到固定位置后uboot加载的。
1.开机画面
在uboot中使用splash screen可以实现u-boot启动后,在LCD上显示自定义图片。
#define CONFIG_SPLASH_SCREEN 1
#define CONFIG_EXTRA_ENV_SETTINGS \
"splashimage=10080000\0"
并且要定义splashimage变量以及splash变量所定义的地址存放bmp图片。
2. log图片
include/bmp_logo.h //定义logo相关属性及数据, 由工具制作而成。
12 #define BMP_LOGO_WIDTH 240
13 #define BMP_LOGO_HEIGHT 109
14 #define BMP_LOGO_COLORS 30
15 #define BMP_LOGO_OFFSET 16
3.实现过程
common/lcd.c
start_armboot() --> devices_init()/devices.c
-->drv_lcd_init()/ common/lcd.c
-->lcd_init() /common/lcd.c
-->lcd_clear()
-->lcd_logo()
--> lcd_display_bitmap(addr, 0, 0); //显示开机画面
--> bitmap_plot(0, 0); //显示logo
4.lcd相关数据结构,定义于include/lcd.h
typedef struct vidinfo {
162 u_long vl_col; /* Number of columns (i.e. 640) */
163 u_long vl_row; /* Number of rows (i.e. 480) */
164 u_long vl_clk; /* pixel clock in ps */
165
166 /* LCD configuration register */
167 u_long vl_sync; /* Horizontal / vertical sync */
168 u_long vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
169 u_long vl_tft; /* 0 = passive, 1 = TFT */
170
171 /* Horizontal control register. */
172 u_long vl_hsync_len; /* Length of horizontal sync */
173 u_long vl_left_margin; /* Time from sync to picture */
174 u_long vl_right_margin; /* Time from picture to sync */
175
176 /* Vertical control register. */
177 u_long vl_vsync_len; /* Length of vertical sync */
178 u_long vl_upper_margin; /* Time from sync to picture */
179 u_long vl_lower_margin; /* Time from picture to sync */
180
181 u_long mmio; /* Memory mapped registers */
182 } vidinfo_t;
183
184 extern vidinfo_t panel_info;
typedef struct vidinfo {
162 u_long vl_col; /* Number of columns (i.e. 640) */
163 u_long vl_row; /* Number of rows (i.e. 480) */
164 u_long vl_clk; /* pixel clock in ps */
165
166 /* LCD configuration register */
167 u_long vl_sync; /* Horizontal / vertical sync */
168 u_long vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
169 u_long vl_tft; /* 0 = passive, 1 = TFT */
170
171 /* Horizontal control register. */
172 u_long vl_hsync_len; /* Length of horizontal sync */
173 u_long vl_left_margin; /* Time from sync to picture */
174 u_long vl_right_margin; /* Time from picture to sync */
175
176 /* Vertical control register. */
177 u_long vl_vsync_len; /* Length of vertical sync */
178 u_long vl_upper_margin; /* Time from sync to picture */
179 u_long vl_lower_margin; /* Time from picture to sync */
180
181 u_long mmio; /* Memory mapped registers */
182 } vidinfo_t;
183
184 extern vidinfo_t panel_info;
该结构体示例化panel_info定义于board/atmel/at91sam9g10ek/sam9g10ek.c中:
297 vidinfo_t panel_info = {
298 vl_col: 320,
299 vl_row: 240,
300 vl_clk: 6400000,
301 vl_sync: ATMEL_LCDC_INVLINE_INVERTED |
302 ATMEL_LCDC_INVFRAME_INVERTED|
303 ATMEL_LCDC_INVCLK_INVERTED,
304 vl_bpix: 3,
305 vl_tft: 1,
306 vl_hsync_len: 1,
307 vl_left_margin: 70,
308 vl_right_margin:18,
309 vl_vsync_len: 1,
310 vl_upper_margin:13,
311 vl_lower_margin:9,
312 mmio: AT91SAM9261_LCDC_BASE,
313 };