Xilinx SDK中内存值读法

对FPGA的IP核的控制说白了就是对寄存器的控制，而寄存器又是放在RAM中的，

所以调试时读RAM也是很重要的一步。

 

 

记得在某个手册中看到，我的Atyls的内存是little endian，

所以读内存的时候还要进行转换顺序。

 

摘抄一段Big/Little Endian的解释：

Big-endian and little-endian are terms that describe the order in which a sequence of bytes are stored in computer memory. Big-endian is an order in which the "big end" (most significant value in the sequence) is stored first (at the lowest storage address). Little-endian is an order in which the "little end" (least significant value in the sequence) is stored first. 

 

那么所谓Little Endian，就是小字节在前，大字节在后。

对于16bit，举个例子： 0x12 34，以Little Endian存储则是 34 12。

对于32bit，举个例子：0x12 34 56 78，以Little Endian存储则是 78 56 34 12。