［转载非常好的文章］JLink+GDBServer调试S3C6410裸板的初始化代码 For OK6410开发板
要调试裸板，有两种初始化方法，一个是用烧好的uboot初始化，再有就是直接用JLink+GDBServer初始化。代码参考了网上的资料，根据手头的OK6410开发板做了修改。整体代码如下：
target remote localhost:2331
# Set JTAG speed to 30 kHz
monitor endian little
monitor speed 30
# Reset the target
monitor reset
monitor sleep 10
#
# CPU core initialization
#
# Set the processor to service mode
monitor reg cpsr = 0xd3
# Config MMU
# Flush v3/v4 cache
monitor cp15 7, 7, 0, 0 = 0x0
monitor cp15 8, 7, 0, 0 = 0x0
# Disable MMU stuff and caches
monitor cp15 1, 0, 0, 0 =0x1002
# Peri port setup
monitor cp15 15, 2, 0, 4 = 0x70000013
# Disable watchdog
monitor MemU32 0x7e004000 = 0x00000000
monitor sleep 10
# Disable interrupt
monitor MemU32 0x71200014 = 0xffffffff
monitor MemU32 0x71300014 = 0xffffffff
monitor MemU32 0x7120000C = 0x00000000
monitor MemU32 0x7130000C = 0x00000000
monitor MemU32 0x71200F00 = 0x00000000
monitor MemU32 0x71300F00 = 0x00000000
# Set clock
monitor MemU32 0x7e00f900 = 0x000080de
monitor MemU32 0x7e00f000 = 0x0000ffff
monitor MemU32 0x7e00f004 = 0x0000ffff
monitor MemU32 0x7e00f008 = 0x0000ffff
monitor MemU32 0x7e00f028 = 0x00300000
monitor MemU32 0x7e00f020 = 0x01043310
monitor MemU32 0x7e00f00C = 0x810a0301
monitor MemU32 0x7e00f010 = 0x810a0301
monitor MemU32 0x7e00f014 = 0x80200102
monitor MemU32 0x7e00f018 = 0x00000000
monitor MemU32 0x7e00f01c = 0x00000007
monitor sleep 1
# UART Init
monitor MemU32 0x7f008000 = 0x00220022
monitor memU32 0x7f008020 = 0x00002222
monitor memU32 0x7f005008 = 0x00000000
monitor memU32 0x7f00500c = 0x00000000
monitor memU32 0x7f005000 = 0x00000003
monitor memU32 0x7f005004 = 0x00000e45
monitor memU32 0x7f00502c = 0x0000dfdd
monitor memU32 0x7f005020 = 0x4f4f4f4f
monitor memU32 0x7f005020 = 0x4b4b4b4b
# Config Mobile DDR SDRAM
monitor MemU32 0x7e00f120 = 0x0000000d
monitor MemU32 0x7e001004 = 0x00000004
monitor MemU32 0x7e001010 = 0x0000040f
monitor MemU32 0x7e001014 = 0x00000006
monitor MemU32 0x7e001018 = 0x00000001
monitor MemU32 0x7e00101c = 0x00000002
monitor MemU32 0x7e001020 = 0x00000006
monitor MemU32 0x7e001024 = 0x0000000a
monitor MemU32 0x7e001028 = 0x0000000c
monitor MemU32 0x7e00102c = 0x0000010b
monitor MemU32 0x7e001030 = 0x0000000c
monitor MemU32 0x7e001034 = 0x00000002
monitor MemU32 0x7e001038 = 0x00000002
monitor MemU32 0x7e00103c = 0x00000002
monitor MemU32 0x7e001040 = 0x00000002
monitor MemU32 0x7e001044 = 0x00000010
monitor MemU32 0x7e001048 = 0x00000010
monitor MemU32 0x7e00100C = 0x0001001a
monitor MemU32 0x7e00104C = 0x00000b45
monitor MemU32 0x7e001200 = 0x000150f0
monitor MemU32 0x7e001304 = 0x00000000
monitor MemU32 0x7e001008 = 0x000c0000
monitor MemU32 0x7e001008 = 0x00000000
monitor MemU32 0x7e001008 = 0x00040000
monitor MemU32 0x7e001008 = 0x00040000
monitor MemU32 0x7e001008 = 0x000a0000
monitor MemU32 0x7e001008 = 0x00080032
monitor MemU32 0x7e001004 = 0x00000000
# Setup GDB for faster downloads
#set remote memory-write-packet-size 1024
set remote memory-write-packet-size 4096
set remote memory-write-packet-size fixed
monitor speed 12000
break start_armboot
load
continue
下载逐行说明：
Monitor reg cpsr = 0xd3
这一行是把cpu置为管理模式，并且设置中断掩码I F T M4 M3 M2 M1 M0，对应于0xd3为0xB11010011， I、F置位设置中断及快速中断掩码， T清位，说明当前为ARM模式下， M置为0xB10011，为管理模式。
monitor MemU32 0x7e004000 = 0x00000000
这一行失能看门狗，该寄存器说明如下：
Watchdog timer [5] 0=Disable, 1=Enable
Clock select [4:3] 00:16 01:32 10:64 11:128
Interrupt generation [2] 0=Disable, 1=EnableReset enable/disable [0]
Monitor MemU32 0x71200014 = 0xFFFFFFFF
Monitor MemU32 0x71300014 = 0xFFFFFFFF
设置VIC0INTENCLEAR及VIC1IntENCLEAR寄存器，该寄存器写0无作用，写1会disable相应的中断：
Clears corresponding bits in the VICINTENABLE Register:0 = no effect1 = interrupt disabled in VICINTENABLE Register.There is one bit of the register for each interrupt source.
网上其它资料都是往里写0，应该是个错误。
Monitor MemU32 0x7120000C = 0x00000000
Monitor MemU32 0x7130000C = 0x00000000
设置所有中断为IRQ，而不是FIQ，该寄存器写0为IRQ，写1为FIQ：
Selects type of interrupt for interrupt request:0 = IRQ interrupt (reset)1 = FIQ interruptThere is one bit of the register for each interrupt source
Monitor MemU32 0x71200F00 = 0x00000000
Monitor MemU32 0x71300F00 = 0x00000000
设置VIC0ADDRERSS及VIC1ADDRESS寄存器，清除当前pending的中断:
Contains the address of the currently active ISR, with reset value0x00000000.A read of this register returns the address of the ISR and sets thecurrent interrupt as being serviced. A read must only be performedwhile there is an active interrupt.A write of any value to this register clears the current interrupt. Awrite must only be performed at the end of an interrupt serviceroutine.
Monitor MemU32 0x7e00f900 = 0x000080de
设置OTHERS寄存器为Synchronous mode，网上资料没有设置sync，要试验一下
Monitor MemU32 0x7e00f000 = 0x0000ffff
Monitor MemU32 0x7e00f004 = 0x0000ffff
Monitor MemU32 0x7e00f008 = 0x0000ffff
设置APLL_LOCK、MPLL_LOCK及EPLL_LOCK寄存器，都设为最大间隔
Monitor MemU32 0x7e00f028 = 0x00300000
设置CLK_DIV2寄存器，主要是设置UART_RATIO:
UART_RATIO [19:16]
UART clock divider ratio
CLKUART = CLKUARTIN / (UART_RATIO + 1)
这里的设置是CLKUART = CLKUARTIN / 4
Monitor MemU32 0x7e00f020 = 0x01043310
设置CLK_DIV0寄存器, 设置的值如下
PCLK_RATIO [15:12] 0x3
HCLKX2_RATIO [11:9] 0x1
HCLK_RATIO [8] 0x1
MPLL_RATIO [4] 0x1
APLL_RATIO [3:0] 0x0
根据如下的计算公式
PCLK = HCLKX2 / (PCLK_RATIO + 1)
HCLKX2 = HCLKX2IN / (HCLKX2_RATIO + 1)
HCLK = HCLKX2 / (HCLK_RATIO + 1)
DOUTMPLL = MOUTMPLL / (MPLL_RATIO + 1)
ARMCLK = DOUTAPLL / (ARM_RATIO + 1)
得到的计算结果
PCLK = HCLKX2 / 4
HCLKX2 = HCLKX2IN / 2
HCLK = HCLKX2 / 2
DOUTMPLL = MOUTMPLL / 2
ARMCLK = DOUTAPLL
Monitor MemU32 0x7e00f00c = 0x810a0301
Monitor MemU32 0x7e00f010 = 0x810a0301
设置APLL_CON及MPLL_CON寄存器，
计算公式为
FOUT = MDIV X FIN / (PDIV X 2SDIV)
对于APLL_CON寄存器：
Enable [31] 0x1
MDIV [25:16] 0x10a(266)
PDIV [13:8] 0x3
SDIV [2:0] 0x1
则FOUT = 266 X 12 / (3 X 2) = 532
对于MPLL_CON寄存器是一样的，也是532
Monitor MemU32 0x7e00f014 = 0x80200102
Monitor MemU32 0x7300f018 = 0x00000000
设置EPLL_CON0寄存器
Enable [31] 0x1
MDIV [23:16] 0x20
PDIV [13:8] 0x1
SDIV [2:0] 0x2
设置EPLL_CON1寄存器
KDIV [15:0] 0x0
根据计算公式：FOUT = (MDIV + KDIV / 216) X FIN / (PDIV X 2SDIV)
可以计算得到FOUT = 32 X 12 / (1 X 4) = 96
Monitor MemU32 0x7e00f01c = 0x00000007
设置CLK_SRC寄存器
UART_SEL [13] 0x0 using MOUT epll
EPLL_SEL [2] 0x1 using FOUT epll
MPLL_SEL [1] 0x1 using FOUT mpll
APLL_SEL [0] 0x1 using FOUT apll
Monitor MemU32 0x7f008000 = 0x00220022
设置GPACON寄存器
GPA0 [3:0] 0x2 UART RXD[0]
GPA1 [7:4] 0x2 UART TXD[0]
GPA2 [11:8] 0x0 Input
GPA3 [15:12] 0x0 Input
GPA4 [19:16] 0x2 UART RXD[1]
GPA5 [23:20] 0x2 UART TXD[1]
Monitor MemU32 0x7f008020 = 0x00002222
设置GPBCON寄存器
GPB0 UART_RXD[2]
GPB1 UART TXD[2]
GPB2 UART RXD[3]
GPB3 UART TXD[3]
Monitor memU32 0x7f005008 = 0x00000000
设置UFCON0寄存器：
FIFO disable
Monitor memU32 0x7f00500c = 0x00000000
设置UMCON0寄存器：
Modem interrupt Disable
Monitor MemU32 0x7f005000 = 0x00000003
设置ULCON0寄存器
Word Length 8-bit
One shop bit per frame
No parity Mode Normal mode operation
Monitor MemU32 0x7f005004 = 0x00000e45
设置UCON0寄存器
Clock selection EXT_UCLK1: DIV_VAL=(EXT_UCLK1/(bps x16))-1
Tx Interrupt Type: Level
Rx Interrupt Type: Pulse
Rx Time Out Enable: disable
Rx Error status interrupt enable: enable
Loop-back Mode: normal operation
Send break signal: normal transmit
Transmit Mode: Interrupt request or polling mode
Receive Mode: Interrupt request or polling mode
monitor memU32 0x7f005028 = 0x00000033
Div integer part is 0x33 (51)
Monitor memU32 0x7f00502c = 0x0000dfdd
设置UDIVSLOT0寄存器
0.83 * 16 = 13.3 = 13 so 0xdfdd
Monitor memU32 0x7f005020 = 0x4f4f4f4f
Monitor memU32 0x7f005020 = 0x4b4b4b4b
设置UTXH0寄存器，发送数据
Monitor MemU32 0x7300f120 = 0x0000000d
设置MEM_SYS_CFG寄存器:
Xm0CSn2 = NFCON CS0,
Xm0CSn3 = NFCON CS1
monitor MemU32 0x7e001004 = 0x00000004
设置P1MEMCCMD寄存器: command: Configure
Monitor MemU32 0x7e001010 = 0x0000040f
设置P1REFRESH寄存器： Refresh period = (((HCLK/1000*DDR_tREFRESH)-1)/1000) = 1037
Monitor MemU32 0x7e001014 = 0x00000006
设置P1CASLAT寄存器： CAS Latency [3:1] 0x3
Monitor MemU32 0x7e001018 = 0x00000001
设置P1T_DQSS寄存器： T_DQSS [1:0] 0x1
Monitor MemU32 0x7e00101c = 0x00000002
设置P1T_MRD寄存器： T_MRD [6:0] 0x2
Monitor MemU32 0x7e001020 = 0x00000006
设置P1T_RAS寄存器：
T_RAS [3:0] 0x6T_RAS = (((HCLK / 1000 * DDR_tRAS) -1) / 1000000 + 1) = 6.98
Monitor MemU32 0x7e001024 = 0x0000000a
设置P1T_RC寄存器
T_RC [3:0] 0xa T_RC = (((HCLK / 1000 * DDR_tRC) -1) / 1000000 + 1) = 10.04
Monitor MemU32 0x7e001028 = 0x0000000c
设置P1T_RCD寄存器
Scheduled_RCD [5:3] 0x1 T_RCD [2:0] 0x4 T_RCD = (((HCLK / 1000 * DDR_tRCD) – 1) / 1000000 + 1) = 4.05
Monitor MemU32 0x7e00102c = 0x0000010b
设置PnT_RFC寄存器
Scheduled_RFC [9:5] T_RFC [4:0]
T_RFC = (((HCLK / 1000 * DDR_tRFC) – 1) / 1000000 + 1) = 11.6
Monitor MemU32 0x7e001030 = 0x0000000c
设置P1T_RP寄存器
Scheduled_RP [5:3]
T_RP [2:0] T_RP = (((HCLK / 1000 * DDR_tRP) -1) / 1000000 + 1) = 4.05
Monitor MemU32 0x7e001034 = 0x00000002
设置P1T_RRD寄存器
T_RRD [3:0] T_RRD = (((HCLK / 1000 * DDR_tRRD) – 1) / 1000000 + 1) = 2.99
Monitor MemU32 0x7e001038 = 0x00000002
设置P1T_WR寄存器
T_WR [2:0] T_WR = (((HCLK / 1000 * DDR_tWR) – 1) / 1000000 + 1) = 2.99
Monitor MemU32 0x7e00103c = 0x00000002
设置P1T_WTR寄存器
T_WTR [2:0] 0x2
Monitor MemU32 0x7e001040 = 0x00000002
设置P1T_XP寄存器
T_XP [7:0] 0x2
Monitor MemU32 0x7e001044 = 0x00000010
设置P1T_XSR寄存器
T_XSR [7:0] T_XSR = (((HCLK / 1000 * DDR_tXSR) – 1) / 1000000 + 1) = 16.9
Monitor MemU32 0x7e001048 = 0x00000010
设置P1T_ESR寄存器
T_ESR [7:0]T_ESR = t_XSR
Monitor MemU32 0x7e00100c = 0x0001001a
设置P1MEMCFG寄存器
Active chips [22:21] 0x0 1chip
Qos master bits [20:18] 0x0 ARID[3:0]
Memory burst [17:15] 0x2 Burst 4
Stop mem clock [14] 0x0 Auto power down [13] 0x0
Power down prd [12:7] 0x0 AP bit [6] 0x0
Row bits [5:3] 0x3 14bits
Column bits [2:0] 0x2 10bits
Monitor MemU32 0x7e00104c = 0x00000b45
设置P1MEMCFG2寄存器
Read delay [12:11] 0x1
Read delay 1 cycle(usually for mobile DDR SDRAM)
Memory type [10:8] 0x3 Mobile DDR SDRAM
Memory width [7:6] 0x1 32-bit
Cke_init [3] 0x0
DQM init [2] 0x1
A_gt_m_sync [1] 0x0
Sync [0] 0x1
Monitor MemU32 0x7e001200 = 0x000150f0
设置P1_chip_0_cfg寄存器
BRC_RBC [16] 0x1 Bank-Row-Column organization
Address match [15:8] 0x50 (80)
Address mask [7:0] 0xf0
Monitor MemU32 0x7e001304 = 0x00000000
设置P1_user_cfg寄存器
DQS3 input chain delay selection [14:12] 0 minimum delay chain is used.
DQS2 input chain delay selection [10:8] 0x0
DQS1 input chain delay selection [6:4] 0x0
DQS0 input chain delay selection [2:0] 0x0
Monitor MemU32 0x7e001008 = 0x000c0000
设置P1 DIRECTCMD 寄存器
Chip number [21:20] 0x0
Memory command [19:18] 0x3 NOP
Monitor MemU32 0x7e001008 = 0x00000000
Precharge all
Monitor MemU32 0x7e001008 = 0x00040000
Auto refresh (need two times)
Monitor MemU32 0x7e001008 = 0x000a0000
Memory command [19:18] 0x2
Modereg or extended modereg
Bank address [17:16] 0x2
Monitor MemU32 0x7e001008 = 0x00080032
CAS 3,
Burst Length 4
monitor MemU32 0x7e001004 = 0x00000000
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