实验一 QuartusII的VHDL输入设计
http://blog.163.com/gyh_tx/blog/static/20555702220134220205011
http://blog.163.com/gyh_tx/blog/static/20555702220134299950703
http://blog.163.com/gyh_tx/blog/static/20555702220134220205011
http://blog.163.com/gyh_tx/blog/static/20555702220134299950703