文章来源为noraml matloff教授写的Major Componets of Computer "Engine",文章有点老,意义还是有的:-)
History of Intel CPU Structure
The earliest widely-used Intel processor chip was the 8080. Its word size was 8 bits, and it included registers
named A, B, C and D (and a couple of others). Address size was 16 bits.
The next series of Intel chips, the 8086/8088,and then the 80286, featured 16-bit words and 20-bit addresses.
The A, B, C and D registers were accordingly extended to 16-bit size and renamed AX, BX, CX
and DX (‘X’ stood for “extended”). Other miscellaneous registers were added. The lower byte of AX was
called AL, the higher byte AH, and similarly for BL, BH, etc.
最早被广泛应用的Intel处理器是8080.它的字长为8,包括A,B,C,D(还有一些其他的)寄存器,地址长度为16位。接下来的Intel芯片是8086/8080，然后是80286，拥有16位的字长和20位的地址长度。A,B,C,D寄存器也相应的扩展到16位长，并被命名为AX,BX,CX,DX('X'代表"扩展的")。一些各种功能的寄存器也增加了。AX的低位被称作AL，高位作为AH，BL，BH等也一样。
Beginning with the 80386 and extending to the Pentium series, both word and address size has been 32 bits.
The registers were again extended in size, to 32 bits, and renamed EAX, EBX and so on (‘E’ for “extended”).
The pre-32-bit Intel CPUs, starting with 8086/8088, replaced the single register PC with a pair of registers,
CS (for code segment) and IP (for instruction pointer). A rough description is that the CS register pointed to
the code segment, which is the place in memory where the program’s instructions start, and the IP register
then specified the distance in bytes from that starting point to the current instruction. Thus by combining
the information given in c(CS) and c(IP), we obtained the absolute address of the current instruction.
从80386开始到奔腾系列，字长和地址长度都变成了32位，寄存器也再次扩展到32位，并被称为EAX，EBX('E'代表"扩展的")。在32位之前的Intel CPU，从8086/8088开始，把单个PC寄存器用一对寄存器取代，CS(代码段)和IP(指令指针)。一个粗糙的描述就是CS寄存器指向代码段，也就是内存中程序指令开始执行的地方，IP寄存器接着指定用字节表示的从当前指令到起始点的距离。这样通过两者结合，我们可以得到当前指令的绝对地址。
This is still true today when an Intel CPU runs in in 16-bit mode, in which case it generates 20-bit addresses.
The CS register is only 16 bits, but it represents a 20-bit address whose least significant four bits are implicitly
0s. (This implies that code segments are allowed to begin only at addresses which are multiples of 16.)
The CPU generates the address of the current instruction by concatenating c(CS) with four 0 bits and then
adding the result to c(IP).
这在今天看来也仍是正确的，如果Intel CPU运行在16位模式，在这种情况下，它产生20位的地址。CS寄存器只有十六位，但它确表示二十位的地址，这就暗示地址的最低4位为'0'。(这表示代码段只能在16的倍数的地址上开始)。CPU通过在CS上添加4个'0'位再加上IP的值来取得当前的指令地址。
Suppose for example the current instruction is located at 0x21082, and the code segment begins at 0x21040.
Then c(CS) and c(IP) will be 0x2104 and 0x0042, respectively, and when the instruction is to be executed,
its address will be generated by combining these two values as shown above.
假设当前的指令地位为0x21082，代码段从0x21040开始，那么CS和IP就应该分别为0x2104和0x0042。当指令被执行时，它的地址就上面的两个值相加得到。
The situation is similar for stacks and data. For example, instead of having a single SP register as in our
model of a typical CPU above, the earlier Intel CPUs (and current CPUs when they are running in 16-bit
mode) use a pair of registers, SS and SP. SS specifies the start of the stack segment, and SP contains the
distance from there to the current top-of-stack. For data, the DS register points to the start of the data
segment, and a 16-bit value contained in the instruction specifies the distance from there to the desired data
item.
栈和数据的情况也类似。例如，早期的Intel CPUs(和运行在16位模式的现在的CPUs)使用一对寄存器，SS和SP，而不是向上面典型的CPU那样只用单个的SP寄存器。SS指定栈段的开始，SP包含从那里到栈顶的距离。对于数据来说，DS寄存器指向数据段的开始，指令中的一个16位的值指定到需要的数据项的距离。
Since IP, SP and the data-item distance specified within an instruction are all 16-bit quantities, it follows
that the code, stack and data segments are limited to 216= 65, 536 bytes in size. This can make things quite
inconvenient for the programmer. If, for instance, we have an array of length, say, 100,000 bytes, we could
not fit the array into one data segment. We would need two such segments, and the programmer would have
to include in the program lines of code which change the value of c(DS) whenever it needs to access a part
of the array in the other data segment.
由于IP，SP以及指令中指定的数据的距离都是16位的值，这就使得代码段，栈段和数据段的长度都被限制在216= 65,536位。这样对程序员来说很不方便。比如，如果我们有个数组的长度为，假如100,000byte，我们就不能把它放入一个数据段中。我们需要两个这样的段，而且当程序员需要访问在另一个段中的数组时，需要在代码行中放入改变DS值的代码。
These problems are avoided by the newer operating systems which run on Intel machines today, such as
Windows and Linux, since they run in 32-bit mode. Addresses are also of size 32 bits in that mode, and IP,
SP and data-item distance are 32 bits as well. Thus a code segment, for instance, can fill all of memory, and
segment switching as illustrated above is unnecessary.
今天这些问题被运行在Intel机器上的新的操作系统避免了，例如Windows和Linux，由于他们运行在32位模式。这种模式下地址也是32位的，IP，SP和数据距离也同样。这样一个代码段可以填满整个内存，而且像上面那样的段切换也不再需要了。
发现这一段的意思不是太大，不过还是坚持翻完了
时间也花了一个多小时，还是看快。
History of Intel CPU Structure
The earliest widely-used Intel processor chip was the 8080. Its word size was 8 bits, and it included registers
named A, B, C and D (and a couple of others). Address size was 16 bits.
The next series of Intel chips, the 8086/8088,and then the 80286, featured 16-bit words and 20-bit addresses.
The A, B, C and D registers were accordingly extended to 16-bit size and renamed AX, BX, CX
and DX (‘X’ stood for “extended”). Other miscellaneous registers were added. The lower byte of AX was
called AL, the higher byte AH, and similarly for BL, BH, etc.
最早被广泛应用的Intel处理器是8080.它的字长为8,包括A,B,C,D(还有一些其他的)寄存器,地址长度为16位。接下来的Intel芯片是8086/8080，然后是80286，拥有16位的字长和20位的地址长度。A,B,C,D寄存器也相应的扩展到16位长，并被命名为AX,BX,CX,DX('X'代表"扩展的")。一些各种功能的寄存器也增加了。AX的低位被称作AL，高位作为AH，BL，BH等也一样。
Beginning with the 80386 and extending to the Pentium series, both word and address size has been 32 bits.
The registers were again extended in size, to 32 bits, and renamed EAX, EBX and so on (‘E’ for “extended”).
The pre-32-bit Intel CPUs, starting with 8086/8088, replaced the single register PC with a pair of registers,
CS (for code segment) and IP (for instruction pointer). A rough description is that the CS register pointed to
the code segment, which is the place in memory where the program’s instructions start, and the IP register
then specified the distance in bytes from that starting point to the current instruction. Thus by combining
the information given in c(CS) and c(IP), we obtained the absolute address of the current instruction.
从80386开始到奔腾系列，字长和地址长度都变成了32位，寄存器也再次扩展到32位，并被称为EAX，EBX('E'代表"扩展的")。在32位之前的Intel CPU，从8086/8088开始，把单个PC寄存器用一对寄存器取代，CS(代码段)和IP(指令指针)。一个粗糙的描述就是CS寄存器指向代码段，也就是内存中程序指令开始执行的地方，IP寄存器接着指定用字节表示的从当前指令到起始点的距离。这样通过两者结合，我们可以得到当前指令的绝对地址。
This is still true today when an Intel CPU runs in in 16-bit mode, in which case it generates 20-bit addresses.
The CS register is only 16 bits, but it represents a 20-bit address whose least significant four bits are implicitly
0s. (This implies that code segments are allowed to begin only at addresses which are multiples of 16.)
The CPU generates the address of the current instruction by concatenating c(CS) with four 0 bits and then
adding the result to c(IP).
这在今天看来也仍是正确的，如果Intel CPU运行在16位模式，在这种情况下，它产生20位的地址。CS寄存器只有十六位，但它确表示二十位的地址，这就暗示地址的最低4位为'0'。(这表示代码段只能在16的倍数的地址上开始)。CPU通过在CS上添加4个'0'位再加上IP的值来取得当前的指令地址。
Suppose for example the current instruction is located at 0x21082, and the code segment begins at 0x21040.
Then c(CS) and c(IP) will be 0x2104 and 0x0042, respectively, and when the instruction is to be executed,
its address will be generated by combining these two values as shown above.
假设当前的指令地位为0x21082，代码段从0x21040开始，那么CS和IP就应该分别为0x2104和0x0042。当指令被执行时，它的地址就上面的两个值相加得到。
The situation is similar for stacks and data. For example, instead of having a single SP register as in our
model of a typical CPU above, the earlier Intel CPUs (and current CPUs when they are running in 16-bit
mode) use a pair of registers, SS and SP. SS specifies the start of the stack segment, and SP contains the
distance from there to the current top-of-stack. For data, the DS register points to the start of the data
segment, and a 16-bit value contained in the instruction specifies the distance from there to the desired data
item.
栈和数据的情况也类似。例如，早期的Intel CPUs(和运行在16位模式的现在的CPUs)使用一对寄存器，SS和SP，而不是向上面典型的CPU那样只用单个的SP寄存器。SS指定栈段的开始，SP包含从那里到栈顶的距离。对于数据来说，DS寄存器指向数据段的开始，指令中的一个16位的值指定到需要的数据项的距离。
Since IP, SP and the data-item distance specified within an instruction are all 16-bit quantities, it follows
that the code, stack and data segments are limited to 216= 65, 536 bytes in size. This can make things quite
inconvenient for the programmer. If, for instance, we have an array of length, say, 100,000 bytes, we could
not fit the array into one data segment. We would need two such segments, and the programmer would have
to include in the program lines of code which change the value of c(DS) whenever it needs to access a part
of the array in the other data segment.
由于IP，SP以及指令中指定的数据的距离都是16位的值，这就使得代码段，栈段和数据段的长度都被限制在216= 65,536位。这样对程序员来说很不方便。比如，如果我们有个数组的长度为，假如100,000byte，我们就不能把它放入一个数据段中。我们需要两个这样的段，而且当程序员需要访问在另一个段中的数组时，需要在代码行中放入改变DS值的代码。
These problems are avoided by the newer operating systems which run on Intel machines today, such as
Windows and Linux, since they run in 32-bit mode. Addresses are also of size 32 bits in that mode, and IP,
SP and data-item distance are 32 bits as well. Thus a code segment, for instance, can fill all of memory, and
segment switching as illustrated above is unnecessary.
今天这些问题被运行在Intel机器上的新的操作系统避免了，例如Windows和Linux，由于他们运行在32位模式。这种模式下地址也是32位的，IP，SP和数据距离也同样。这样一个代码段可以填满整个内存，而且像上面那样的段切换也不再需要了。
发现这一段的意思不是太大，不过还是坚持翻完了
时间也花了一个多小时，还是看快。
