2014年11月4日
verilog behavioral modeling --loop statement
摘要： 1.forever2.repeat3.while4.forThe for statement accomplishes the same results as the following pseudo-code that is based on the while loop: begin initi... 阅读全文
posted @ 2014-11-04 19:01 CHIPER 阅读(151) 评论(0) 推荐(0) 编辑
verilog behavioral modeling--branch statement
摘要： conditional statementcasestatement1. conditional statement if(expression) statement_or_null[else statement_or_null] | if_else_if_statementIf the expre... 阅读全文
posted @ 2014-11-04 18:55 CHIPER 阅读(332) 评论(0) 推荐(0) 编辑
verilog behavioral modeling--procedural continous assignment(不用)
摘要： assign / deassginforce /releasethe procedural continuous assignments(using keywords assign and force) are procedural statements that allow expressions... 阅读全文
posted @ 2014-11-04 16:27 CHIPER 阅读(805) 评论(0) 推荐(0) 编辑
verilog behavioral modeling--blocking and nonblocking
摘要： BLOCKING ASSIGNMENTS1.A blocking procedural assignment statement shall be exectuted before the execution of the statements that follow it in a sequen... 阅读全文
posted @ 2014-11-04 15:14 CHIPER 阅读(475) 评论(0) 推荐(0) 编辑
verilog behavioral modeling --procedural assignments
摘要： 1.procedural assignments are used for updating reg ,integer , time ,real,realtime and memory data types.2.difference between procedural assignments an... 阅读全文
posted @ 2014-11-04 14:14 CHIPER 阅读(326) 评论(0) 推荐(0) 编辑