MIPS 架构

1.MIPS (Microprocessor without Interlocked Pipeline Stages):

(1)     Define a control register set as well as the instruction set.

(2)     RISC

(3)     Features about assembly language:

　　a)         Integer: there are 32 integer registers

　　b)         Floating point : has 32 floating-point, two registers paired for double precision numbers.

　　c)         Pseudo instructions: translated into sequence of real instructions by assembler.

(4)     Architecture :