PicoRV32-on-PYNQ-Z2: An FPGA-based SoC System——RISC-V On PYNQ项目复现
本文参考:
👉 1️⃣ 原始工程
👉 2️⃣ 原始工程复现教程
👉 3️⃣ RISCV工具链安装教程
本文工程:
https://bhpan.buaa.edu.cn:443/link/3FE41DC838E0ADF54B72088B22653E73
1.准备工作
👇下面以LOCATION代表本地源存储库的安装目录,以home/xilinx代表在PYNQ-Z2开发板上的目录 ❗
-
下载Vivado2017.4
由于最初的源工程是利用Vivado2017.4来创建的,可能也有一些方法可以在其他版本打开,但没有原始工程的xpr文件,所以下载了一个Vivado2017.4,网上的安装教程很多。 -
下载两个源存储库:
①
git clone https://github.com/drichmond/RISC-V-On-PYNQ
其中,RISC-V-On-PYNQ中的Picrov32是以子模块的形式链接在仓库中,需要通过下面的链接下载后再传入RISC-V-On-PYNQ中相应的位置。
https://github.com/YosysHQ/picorv32/tree/9b6ea045f9b539b0f708d71962716e5dde865181
或者可以通过下面的命令直接递归下载子文件夹👇
git clone --recursive https://github.com/drichmond/RISC-V-On-PYNQ
最后RISC-V-On-PYNQ中的目录结构应如下图所示
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230610154744461-1698646287.png)
②
git clone --recursive https://github.com/riscv/riscv-gnu-toolchain \home\xilinx\riscv-gnu-toolchain
此为RISC-V工具链,在下载过程中可能会遇到以下报错:
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230610155209745-1519726131.png)
单纯的网络连接不稳定,可以网页开个github试下,什么时候能打开了,这边也就通了。
若报错Git 客户端无法验证服务器证书的有效性,因此无法建立与服务器的安全连接,可以使用以下命令来配置 Git 客户端:
git config --global http.sslVerify false
git config --global https.sslVerify false
以及如果网络一直不太好的话,据说有这个方法可以通过增加缓存大小来提速(因为没有对比测试过,所以我也不太确定这个有没有大用つ﹏⊂)
git config --global http.postBuffer 524288000
再如果说,一直出现各种报错的话,可以将本工程文件中主目录下的makefile文件通过WinSCP传入PYNQ-Z2,并在相应目录下执行👇
make download-tools
此为自动下载的脚本,来源于Picorv32工程,可以判断目录下的递归文件夹是否安装,但也会由于网络连接问题重开,如果说网络问题是在无法解决,gitee上据说有相应的库,可能会好一些。
2.生成RISC-V处理器比特流
- 将Picrov32封装成为Vivado IP:
使用Vivado 2017.4创建一个工程:
Project name: picorv32_prj
Project location: LOCATION/RISC-V-On-PYNQ/ip/
Project Type: RTL Project
Source files: picorv32.v LOCATION/RISC-V-On-PYNQ/picorv32
Constraint files: None
parts: xc7z020clg400-1
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230610173500437-1469097837.png)
将自定义接口IP添加到Vivado工程:Flow Navigator->PROJECT MANAGER->Settings
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230610173636301-821195199.png)
将该工程封装为IP核:Tools -> Create and Package New IP…
Packaging Options: Package your current project
IP location: LOCATION/RISC-V-On-PYNQ/ip/picorv32_tut
Identification:
Vendor: cliffordwolf
Library: ip
Name: picorv32_tut
Display name: PicoRV32 Processor with AXI Interface(Tutorial Version)
Vendor display name: PicoRV32 Processor with AXI Interface(Tutorial Version)
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230610174203954-622173001.png)
Customization Parameters:
就所有参数值的格式均改为bool,并按照图中所示的值对参数值进行修改
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230610183418717-1227721118.png)
Ports and Interfaces:
右键mem_axi->Edit Interface…
**General:**
Interface Definition: aximm_rtl
**Port Mapping:**
AWADDR - mem_axi_awaddr
AWPROT - mem_axi_awprot
AWVALID - mem_axi_awvalid
AWREADY - mem_axi_awready
WDATA - mem_axi_wdata
WSTRB - mem_axi_wstrb
WVALID - mem_axi_wvalid
WREADY - mem_axi_wready
BVALID - mem_axi_bvalid
BREADY - mem_axi_bready
ARADDR - mem_axi_araddr
ARPROT - mem_axi_arprot
ARVALID - mem_axi_arvalid
ARREADY - mem_axi_arready
RDATA - mem_axi_rdata
RVALID - mem_axi_rvalid
RREADY - mem_axi_rready
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230610184020365-724673734.png)
Addressing and Memory:
运行Addressing and Memory Map Wizard,选择mem_axi,相关设置如下图所示👇
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230610185310687-716555202.png)
Review and Package:
点击Package IP即可。
- 为PYNQ-Z2创建RISC-V比特流:
将LOCATION/RISC-V-On-PYNQ/riscvonpynq/目录下的PYNQ-Z1.xdc文件的72,73行改为如下:
set_property -dict {PACKAGE_PIN P15 IOSTANDARD LVCMOS33} [get_ports arduino_iic_scl_io]
set_property -dict {PACKAGE_PIN P16 IOSTANDARD LVCMOS33} [get_ports arduino_iic_sda_io]
在目录LOCATION/RISC-V-On-PYNQ下右键打开MobaXterm,执行以下命令:
make synth
vivado tutorial/tutorial.xpr
若报错没有make命令,则可\(apt-get\) \(make\)进行安装;
若报错没有vivado命令,则是由于未将Vivado添加到环境变量中,找到Vivado的安装目录下的bin目录,按下图所示添加到环境变量中,
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230610190503654-1089961329.png)
Win+R打开cmd,输入\(vivado\) \(-version\)检查环境变量是否配置成功,成功则有如下显示👇
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230610190730738-338829324.png)
执行上面的第一条命令,vivado将进行创建工程并综合,综合结果如下👇,即可输入第二条命令打开工程
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230618113622856-1499652901.png)
执行命令完成后将打开tutorial.xpr工程,打开其中的tutorial.bd文件
![](https://img-blog.csdnimg.cn/20190806112703981.png?x-oss-process=image/watermark,type_ZmFuZ3poZW5naGVpdGk,shadow_10,text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3FxXzM5MjI5MDA2,size_16,color_FFFFFF,t_70)
双击tutorialProcessor:
![](https://img-blog.csdnimg.cn/20190806112718781.png?x-oss-process=image/watermark,type_ZmFuZ3poZW5naGVpdGk,shadow_10,text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3FxXzM5MjI5MDA2,size_16,color_FFFFFF,t_70)
点击+号 , 将PicoRV32 Processor with AXI Interface (Tutorial Version) IP添加进去:
![](https://img-blog.csdnimg.cn/20190806112737869.png?x-oss-process=image/watermark,type_ZmFuZ3poZW5naGVpdGk,shadow_10,text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3FxXzM5MjI5MDA2,size_16,color_FFFFFF,t_70)
双击端口mem_axi,修改其频率为50000000。
并按照下图连线:
![](https://img-blog.csdnimg.cn/20190806113042299.png?x-oss-process=image/watermark,type_ZmFuZ3poZW5naGVpdGk,shadow_10,text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3FxXzM5MjI5MDA2,size_16,color_FFFFFF,t_70)
进入Address Editor窗口,分配地址映射:
![](https://img-blog.csdnimg.cn/20190806113100807.png?x-oss-process=image/watermark,type_ZmFuZ3poZW5naGVpdGk,shadow_10,text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3FxXzM5MjI5MDA2,size_16,color_FFFFFF,t_70)
右击tutorialProcessor/riscvBramController->Assign Address
Offset Address: 0x0000_0000
High Address: 0x0000_FFFF
![](https://img-blog.csdnimg.cn/20190806113119499.png?x-oss-process=image/watermark,type_ZmFuZ3poZW5naGVpdGk,shadow_10,text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3FxXzM5MjI5MDA2,size_16,color_FFFFFF,t_70)
运行Tools-Validate Design,提示有warning直接跳过
点击Generate Bitstream生成比特流文件,文件位置为:\(/tut/tutorial/tutorial.runs/impl\_1\),将tutorial_wrapper.bit文件转移到tut目录下,并改名为tutorial.bit
点击File->Exports…->Export Block Design,导出设计到tcl文件中并覆盖之前的文件,同时需确保Automatically create top design没有被勾选
![](https://img-blog.csdnimg.cn/20190806113248923.png?x-oss-process=image/watermark,type_ZmFuZ3poZW5naGVpdGk,shadow_10,text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3FxXzM5MjI5MDA2,size_16,color_FFFFFF,t_70)
将操作完成的整个工程放到PYNQ-Z2的home/xilinx目录下
3.在PYNQ-Z2上编译RISC-V GCC工具链
- 工具链的下载:
在按照官方例程进行下载时,出现了很多的报错问题,反复尝试了很多次都未能解决,而且经常由于网络连接问题而重开。
最终在上面的参考博客中找到了整个工具链的自动安装脚本,即工程主目录下的Makefile文件。
在目标安装目录下执行命令👇
make download-tools
便开始了漫长的下载过程,期间在安装完一个子模块后可能会卡住然后报错,这种情况绝大多数是因为网络原因造成的,如果失败了可以再执行一次上述的命令,当一个子模块安装好,重新执行命令时会自动跳过安装好的模块,继续下一个模块的安装。
在安装完所有的模块后,执行如下命令👇,便可以构建一个纯RV32IM CPU的完整工具链了
make -j$(nproc) build-riscv32im-tools
回车后在命令行输入YES即可执行。
该步骤会等待的时间较长,去问了相关的博主,他们的编译时间大概在1h左右,猜测可能是由于我是通过PYNQ联网的原因,我的执行时间大概在四五个小时左右,过程中最好别碰,一断网那种心碎💔
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230618114045166-924920613.jpg)
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230618113511525-158050426.png)
执行下面语句将编译生成的\(opt/riscv32im/bin\)配置到环境变量中,在JupyterNotebook中执行如下代码👇
import os
path = os.environ['PATH'].split()
riscv_path = '/opt/riscv32im/bin'
if(riscv_path not in path):
print('Updating /etc/environment file... ',end="")
!sed -i 's/PATH=\"\(.*\)\"/PATH=\"\/opt\/riscv32im\/bin:\1\"/' /etc/environment
print('done')
else:
print("/etc/environment file already updated")
显示 Updating /etc/environment file… done即配置完成。
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230618113657708-830440572.png)
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230618113644034-796863553.png)
4.测试
在\(home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/tut/\)目录下创建tutorial.py文件,文件内容如下👇
from pynq import Overlay, GPIO, Register
import os
import inspect
from riscvonpynq.Processor import BramProcessor
#--------
class TutorialOverlay(Overlay):
"""Overlay driver for the PicoRV32 bram Overlay
Note
----
This class definition must be co-located with the .tcl and .bit
file for the overlay for the search path modifications in
riscvonpynq.Overlay to work. __init__ in riscvonpynq.Overlay uses
the path of this file to search for the .bit file using the
inspect package.
"""
pass
class TutorialProcessor(BramProcessor):
"""Hierarchy driver for the PicoRV32 BRAM Processor
Note
----
In order to be recognized as a RISC-V Processor hierarchy, three
conditions must be met: First, there must be a PS-Memory-Mapped
Block RAM Controller where the name matches the variable
_bram. Second, the hierarchy name (fullpath) must equal the
variable _name. Finally, there must be a GPIO port with the name
_reset_name.
Subclasses of this module are responsible for setting _name (The
name of the Hierarchy), _bits (Processor bit-width), _proc
(Processor Type Name)
This class must be placed in a known location relative to the
build files for this processor. The relative path can be modified
in __get_path.
"""
_name = 'tutorialProcessor'
_proc = 'picorv32'
_bits = 32
@classmethod
def checkhierarchy(cls, description):
return super().checkhierarchy(description)
def __get_path(self):
"""Get the directory path of this file, or the directory path of the
class that inherits from this class.
"""
# Get file path of the current class (i.e. /opt/python3.6/<...>/stream.py)
file_path = os.path.abspath(inspect.getfile(inspect.getmodule(self)))
# Get directory path of the current class (i.e. /opt/python3.6/<...>/stream/)
return os.path.dirname(file_path)
def __init__(self, description, *args):
"""Return a new Processor object.
Parameters
----------
description : dict
Dictionary describing this processor.
"""
build_path = os.path.join(self.__get_path(), "build")
reset_value = 0
super().__init__(build_path, reset_value, description, *args)
在\({home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/tut/}\)目录下创建__init__.py文件,文件内容如下👇
from . import tutorial
from . import build
将../bram/build拷贝到../tut/build中
在JupyterNotebook中执行以下代码设置当前工作路径为\(home/xilinx/RISC-V-On-PYNQ\)
import os
os.chdir("/home/xilinx/RISC-V-On-PYNQ/")
print(os.getcwd())
执行下面代码导入Overlay👇
import sys
sys.path.insert(0, '/home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/')
from tut.tutorial import TutorialOverlay
overlay = TutorialOverlay("/home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/tut/tutorial.bit")
若没有报错执行以下代码,进行移植的测试👇
%%riscvc test overlay.tutorialProcessor
int main(int argc, char ** argv){
unsigned int * arr = (unsigned int *)argv[1];
return arr[2];
}
但在这里我一直遇到下图的报错
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230618140409993-79333635.png)
后来尝试将tut目录下的.hwh文件删除,则可以正确运行。结果如下👇つ﹏⊂猜测原因可能是由于原始工程是基于PYNQ-Z1设计,相应的.hwh文件并没有被正确地使用或者被修改导致与实际连接的硬件不一致。在这种情况下,Vivado可能会默认使用一个标准的接口配置,而不是自定义的接口。
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230619034439975-942975490.png)
结果表示编译成功,被编译的是test.c文件,编译结果为.o文件。
接着运行编译出的文件,在JupyterNotebook中执行以下代码👇
import numpy as np
arg1 = np.array([4,2,3], np.uint32)
retval = overlay.tutorialProcessor.run(test, arg1)
if(retval != arg1[2]):
print("Test failed!")
else:
print("Test passed!")
执行结果如下图所示👇
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230619034959499-62969022.png)
测试成功后,为了安装资源到板子上,需运行以下代码
!pip3 install --upgrade /home/xilinx/RISC-V-On-PYNQ/
安装成功后的结果如下图所示
![](https://img2023.cnblogs.com/blog/2326690/202306/2326690-20230619035301566-624828584.png)
至此则完成了整个工程的移植,在后续的工作中可以直接在JupyterNotebook中进行编译运行。★,°:.☆( ̄▽ ̄)/$:.°★ 。