xPU pipeline overview

xPU pipeline overview

insn define

item	feature
Dimension	scalar / vector / matrix / space
insn	alu / shift / logic / load-store / control / csr

Pipeline

level

pipeline	feature
order 5 stage	IF,Decode,EXE,MEM,WB
order multi-issue	multi pipeline, frondEnd/backEnd
OoO	out-of-order execute, multi-issue
multi-thread	order, multi-thread; OoO,multi-issue, multi-thread
SIMT	SIMD, multi-thread

example

1. simple pipeline

2. complex pipeline

3. mulit-issue pipeline

4. SIMT pipeline

define

1. 使用buffer解耦
2. 不同长度的pipeline
3. 反馈导致pipeline阻塞

status

1. forward
2. stall

control/operate

1. drain off

2. cutoff

3. back pressure

4. flush

5. Speculative execution

6. buffer read/write

insn mapping

1. pipeline stage: fetch / decode / issue / execute / writeback
2. key data structure: buffer / fifo / cache / arrry

buffer in pipeline

1. stall: 先前传递 Full
2. stall: 先后传递Empty
3. hungry: 先前传递 Empty
4. hungry: 先后传递Full

performance

1. buffer可将流水线解耦
2. 流水线中，各阶段的流量都等于起始的流量则性能达到最佳(后续流水线没有阻塞/断流)
3. 上述特性可用于xPU的流水线性能分析
4. referecen method: TMAT-Top-Down performance analysis methodology

思考

pipeline中如何使用valid-ready控制流水线的阻塞/反压?

pipeline中能使用状态机吗?

1. pipeline寄存器之间使用状态机

1. 状态机编码到valid / invalid

reference

1. 流水线中的valid-ready握手控制打拍
2. 数字芯片设计——握手与反压
3. 流水线设计中的反压操作