SoC vision

SoC vision - SoC 世界观

How to design an IP？

regs interface

  • regs map
  • bus interface

io interface

  • bus interface
  • pin io
  • interrupt
  • dma ack

data path

  • cdc: fifo, 2 stage sync
  • basic component

domain

  • clock domain
  • power domain

verification env

  • tenstbench
  • testcase

build system

  • PPA collection
  • sim
  • synth
  • lint

How to build a SoC？

basic module

SoC basic module design tools funtion
system config registers regs generator regs - HDL
C config macro
dma channel connect dma channel mux
interrupt ctrl interrupt ctrl
pad share pad share / gpio mux
soc clock/rst tree clock/rst generator
power domain power domain creator
ip stub ip initial tool
 bus interface
regs generator
memory stub memory generator
testbench testbench generator
parameter system

road

reference

posted @ 2022-12-28 10:35  乔_木  阅读(50)  评论(0)  编辑  收藏  举报