WHU---嵌入式的一些复习总结

目录

• Prev
  • NZCV Flag
    • N, bit[31]
    • Z, bit[30]
    • C, bit[29]
    • V, bit[28]
  • Q Flag, bit[27]
• Register Introduce
  • LR（Link Register) (R14)
  • APSR (Application Program Status Register)
  • CPSR（Current Program Status Register）
  • SPSR（Saved Program Status Register）
• The instruction in Assembly language(U don't know~)
  • BL (Branch Link)
    • Operation
    • Similar
  • RSB（Reverse subtract without carry）
    • Operation
  • BIC（Bit clear）
    • Operation
    • 💠Eg
  • SUBS （extended register）
  • CMP （Compare） —— Same as SUBS
  • CMN （Compare Negative） —— Same as ADDS
  • MRS （Move to Register from Status register）
    • Syntax
    • Usage
  • MSR（Move to Status register from general-Register）
    • Syntax
  • LDR/STR/LDRB/STRB （Data Instruction）
    • Name
    • Syntax
    • 💠Eg
  • GBLA/GBLL/GBLS （Pseudo Op)
    • Usage
• 一些嵌入式ARM的经典题型。

Prev

NZCV Flag

N, bit[31]

Negative condition flag. Set to 1 if the result of the last flag-setting instruction was negative.

Z, bit[30]

Zero condition flags. Set to 1if the result of the last flag-setting instruction was zero, and 0 otherwise. A result of zero often indicates an equal result from a comparison.

C, bit[29]

Carry condition flag. Set to 1 if the last flag-setting instruction resulted in a carry condition, for example an unsigned overflow on an addition.（无符号的溢出叫进位）

V, bit[28]

Overflow condition flag. Set to 1 if the last flag-setting instruction resulted in an overflow condition, for example a signed overflow on an addition.

Q Flag, bit[27]

The Q flag indicates overflow or saturation. It's one of the program status flags held in the APSR（in the Register Introduce Section.)

The Q flag is set to 1 when saturation(饱和) occurs in saturating arithmetic instructions(简单理解，就是溢出了之后停留在边界，即为饱和), or when overflow occurs in certain multiply instructions.

The Q flag is a sticky(粘性) flag. Although the saturating and certain multiply instructions can set the flag, they cannot clear it. You can execute a series of such instructions, and then test the flag to find out whether saturation or overflow occurred at any point in the series, without having to check the flag after each instruction.

so a simple question, how do we clear or test the Q flag ?

To clear the Q flag, use an MSR instruction to read-modify-write the APSR:

 	MRS r5, APSR
 	BIC r5, r5, #(1<<27)
 	MSR APSR_nzcvq, r5

The state of the Q flag cannot be tested directly by the condition codes. To read the state of the Q > flag, use an `MRS` instruction.

```assembly
	MRS r6, APSR
	TST r6, #(1<<27); Z is clear if Q flag was set

Register Introduce

LR（Link Register) (R14)

Link about LR/SP

LR is link register, used to hold the return address for a function call.

Reference:

LR, the Link Register

Register R14 is used to store the return address from a subroutine（子例程）. At other times, LR can be used for other purposes.

When a BL or BLX instruction performs a subroutine call, LR is set to the subroutine return address. To perform a subroutine return, copy LR back to the program counter（PC）. This is typically done in one of two ways, after entering the subroutine with a BL or BLX instruction:

• Return with a BX LR instruction.

• On subroutine entry, store LR to the stack with an instruction of the form: PUSH {,LR} and use a matching instruction to return: POP {,PC} ...

APSR (Application Program Status Register)

The Application Program Status Register (APSR) holds the program status flags that are accessible in any processor mode.(在任意处理器模式下！)

CPSR（Current Program Status Register）

SPSR（Saved Program Status Register）

The instruction in Assembly language(U don't know~)

BL (Branch Link)

Operation

The BL instruction causes a branch to label, and copies the address of the next instruction into LR (R14, the link register). 跳转

Similar

• BLX :Branch with link, and exchange instruction set.(Thumb!)
• BXJ :Branch, and change to Jazelle execution

RSB（Reverse subtract without carry）

Operation

The RSB instruction subtracts the value in Rn from the value of Operand2. This is useful because of the wide range of options for Operand2.

BIC（Bit clear）

Operation

The BIC (Bit Clear) instruction performs an AND operation on the bits in Rn with the reverse（反码） of the corresponding bits in the value of Operand2.

In certain circumstances, the assembler can substitute BIC for AND, or AND for BIC. Be aware of this when reading disassembly listings.

💠Eg

BIC（位清除）指令对 Rn 中的值 和 Operand2 值的反码按位进行逻辑“与”运算。 (注意:ARM官方网站有误, 写的是补码)
BIC 是 逻辑”与非” 指令, 实现的 Bit Clear的功能

举例:
BIC     R0,   R0  , #0xF0000000
#将 R0  高4位清零

BIC    R1,  R1,   #0x0F
#将R1   低4位清0

SUBS （extended register）

Subtract (extended register), setting flags.

This instruction is used by the alias CMP (extended register).

CMP （Compare） —— Same as SUBS

CMN （Compare Negative） —— Same as ADDS

MRS （Move to Register from Status register）

Personal view, move the contents to general-register from special register.

Syntax

MRS{cond} Rd, psr

psr is one of APSR, CPSR, SPSR. (PSR is program status register)

Usage

Use MRS in combination with MSR as part of a read-modify-write sequence for updating a PSR, for example to change processor mode, or to clear the Q flag.

MSR（Move to Status register from general-Register）

Load an immediate value, or the contents of a general-purpose register, into the specified fields of a Program Status Register (PSR).

Syntax

MSR{cond} psr, Rm

LDR/STR/LDRB/STRB （Data Instruction）

Name

• 第一类
  • LDR：Load Register
  • STR：Store Register
• 第二类
  • LDRB：Load Register Byte
  • STRB：Store Register Byte

Syntax

Skip

LDR|STR{<cond>}{b} <Rd>, [<Rn>, #+<immed_12]{!}
LDR|STR{<cond>}{b} <Rd>, [<Rn>, +<Rm>]{!}
LDR|STR{<cond>}{b} <Rd>, [<Rn>, +<Rm>, <shift> #<immed_5>]{!}
LDR|STR{<cond>}{b} <Rd>, [<Rn>], #+<immed_12
LDR|STR{<cond>}{b} <Rd>, [<Rn>], +<Rm>
LDR|STR{<cond>}{b} <Rd>, [<Rn>], +<Rm>, <shift> #<immed_5>

💠Eg

LDR   R0，[R1]                  ；将存储器地址为R1的字数据读入寄存器R0。

LDR   R0，[R1，R2]             ；将存储器地址为R1+R2的字数据读入寄存器R0。

LDR   R0，[R1，＃8]             ；将存储器地址为R1+8的字数据读入寄存器R0。

LDR   R0，[R1，R2]!           ；将存储器地址为R1+R2的字数据读入寄存器R0，并将新地址R1＋R2写入R1。

LDR   R0，[R1，＃8]!          ；将存储器地址为R1+8的字数据读入寄存器R0，并将新地址R1＋8写入R1。

LDR   R0，[R1]，R2              ；将存储器地址为R1的字数据读入寄存器R0，并将新地址R1＋R2写入R1。

LDR   R0，[R1，R2，LSL＃2]！   ；将存储器地址为R1＋R2×4的字数据读入寄存器R0，并将新地址R1＋R2×4写入R1。

LDR   R0，[R1]，R2，LSL＃2     ；将存储器地址为R1的字数据读入寄存器R0，并将新地址R1＋R2×4写入R1。

• !代表需要修改寄存器中的值

GBLA/GBLL/GBLS （Pseudo Op)

The GBLA, GBLL, and GBLS directives declare and initialize global variables.

Usage

The GBLA directive declares a global arithmetic variable, and initializes its value to 0.

The GBLL directive declares a global logical variable, and initializes its value to {False}.

The GBLS directive declares a global string variable, and initializes ite value to a null string, "".

Using one of these directives for a variable that is already defined re-initializes the variable.

The scope of the variable is limited to the source file that contains it.

Set the value of the variable with a SETA, SETL, or SETS directive.

一些嵌入式ARM的经典题型。

有100个有符号的字数据，存放在内存BUFF中，编完整的程序（包括代码段、数据段）找出最大值、最小值分别放入内存单元MAX、MIN中。

AREA Block, CODE, READONLY
ENTRY
START
	LDR   R0, =BUFF
	MOV   R1, #100	 ; count <- 100
	LDR   R2, [R0]	 ; R2 <- max
	LDR   R3, [R0]   ; R3 <- min
LOOP
	LDR   R4, [R0], #4 ; R1 <- [R0], R0 = R0 + 4
	CMP   R4, R2		 ; if R1 > MAX
	MOVGT R4, R2
	CMP   R4, R3       ; if R1 < MIN
	MOVLT R4, R3
	SUBS  R1, R1, #1
	BNE   LOOP
	LDR   R0, =MAX
	STR   R2, [R0]
	LDR   R0, =MIN
	STR   R3, [R0]
	
AREA BlockData, DATA, READWRITE
	BUFF DCD 1, -1, 2, 3, 4, 6, 19, -1, 2
	MAX DCD 0
	MIN DCD 0
END