#include <cdefBF533.h> #include <sys\exception.h> #define POLC 0x00004000 #define PORT_CFG_2_3_EXT_FS 0x00000020 #define XFR_TYPE_NON_ITU656 0x0000000C #define SLEN_32 0x001f #define FLOW_1 0x1000 unsigned char iTxBuffer[4000]; unsigned char iRxBuffer[4000]; EX_INTERRUPT_HANDLER(Sport0_RX_ISR); EX_INTERRUPT_HANDLER(Sport0_TX_ISR); void Init_Sport1_TX(int TCLKDIV,int TFSDIV) { *pSPORT0_TCLKDIV = TCLKDIV; *pSPORT0_TFSDIV = TFSDIV; *pSPORT0_TCR1 = ITFS|TFSR|ITCLK; *pSPORT0_TCR2 = 31; } void Init_Sport1_RX(int RCLKDIV,int RFSDIV) { *pSPORT0_RCLKDIV = RCLKDIV; *pSPORT0_RFSDIV = RFSDIV; *pSPORT0_RCR1 = IRFS|RFSR|IRCLK; *pSPORT0_RCR2 = 31; } void Init_DMA(void) { *pDMA1_PERIPHERAL_MAP = 0x1000; *pDMA1_CONFIG = WNR | WDSIZE_32 | DI_EN | FLOW_1; *pDMA1_START_ADDR = (void *)iRxBuffer; *pDMA1_X_COUNT = 1000; *pDMA1_X_MODIFY = 4; *pDMA2_PERIPHERAL_MAP = 0x2000; *pDMA2_CONFIG = WDSIZE_32 | DI_EN |FLOW_1; *pDMA2_START_ADDR = (void *)iTxBuffer; *pDMA2_X_COUNT = 1000; *pDMA2_X_MODIFY = 4; } void Enable_DMA_Sport0_TX(void) { *pDMA2_CONFIG = (*pDMA2_CONFIG | DMAEN); *pSPORT0_TCR1 = (*pSPORT0_TCR1 | TSPEN); } void Enable_DMA_Sport0_RX(void) { *pDMA1_CONFIG = (*pDMA1_CONFIG | DMAEN); *pSPORT0_RCR1 = (*pSPORT0_RCR1 | RSPEN);; } void Init_Interrupts(void) { *pSIC_IAR0 = 0xffffffff; *pSIC_IAR1 = 0xfffff32f; *pSIC_IAR2 = 0xffffffff; register_handler(ik_ivg9, Sport0_RX_ISR); register_handler(ik_ivg10, Sport0_TX_ISR); *pSIC_IMASK = 0x00000600; } EX_INTERRUPT_HANDLER(Sport0_RX_ISR) { *pDMA1_IRQ_STATUS = 0x0001; printf("SPORT RX DMA Done!\n"); *pSIC_IMASK &= ~0x00000200; } EX_INTERRUPT_HANDLER(Sport0_TX_ISR) { *pDMA2_IRQ_STATUS = 0x0001; printf("SPORT TX DMA Done!\n"); *pSIC_IMASK &= ~0x00000400; } main() { int i; Set_PLL(16,3); Init_EBIU(); Init_SDRAM(); for(i=0;i<4000;i++) iTxBuffer[i]=i; Init_Sport1_TX(7,9); Init_Sport1_RX(7,9); Init_Interrupts(); Init_DMA(); Enable_DMA_Sport0_TX(); Enable_DMA_Sport0_RX(); while(1); }