~Datasheet - AC97
自从 威盛(VIA) 在其MVP3主板芯片中提出了“AC97声卡”这个概念，我们便常常在形形色色的主板说 明书上见到它，最后也就有了“AC97软声卡”一说。发展到后来，“AC97”干脆成了软声卡的代名词。
1996年6月，5家PC领域中颇具知名度和权威性的软硬件公司(Intel、Creative Labs、Analog Device、NS和Yamaha)共同提出了一种全新思路的芯片级PC音源结构，也就是我们现在所见的“AC97”标准(Audio Codec97)。
早期的ISA声卡由于集成度不高，声卡上散布了大量元器件，后来随着技术和工艺水平的发展，出现了单芯片的声卡，只用一块芯片就可以完成声卡所有的功能。但是由于声卡的数字部分和模拟部分集成在一起，很难降低电磁干扰对模拟部分的影响，使得ISA声卡信噪比并不理想。
AC97标准则提出“双芯片”结构，即将声卡的数字与模拟两部分分开，每个部分单独使用一块芯片。AC97标准结合了数字处理和模拟处理两方面的优点，一方面减少了由模拟线路转换至数字线路时可能会出现的噪声，营造出了更加纯净的音质；另一方面， 将音效处理集成到芯片组后，可以进一步降低成本。
1997年后，市场上出现的PCI声卡大多数已经开始符合AC97规范，
Audio codec: 把模拟部分的电路从声卡芯片中独立出来，成为一块称之为“Audio Codec”(多媒体数字信号编解码器)的小型芯片，
Digital Control: 而声卡的主芯片即数字部分则成为一块称之为“Digital Control”(数字信号控制器)的大芯片。
由此可见，AC97并不是某种声卡的代称，而是一种标准。
The AC97 Controller Unit of the S3C6410supports the AC97 revision 2.0 features.
AC97 Controller communicates with AC97 Codecusing audio controller link (AC-link).
Controller sends the stereo PCM data toCodec. The external digital-to-analog converter (DAC)in the Codec converts the audio sample to an analog audio waveform.
Controller receives the stereo PCM data andthe mono Mic data from Codec then store in memories.
FEATURES
The AC97 Controller includes the followingfeatures:
• Independent channels for stereo PCMIn(Slot3, Slot4), mono MIC In(Slot 6), stereo PCM Out(Slot3, Slot4).
• DMA-based operation and interrupt based operation.
• All of the channels support only 16-bitsamples.
• Variable sampling rate AC97 Codecinterface (48KHz and below)
• 16-bit, 16 depth FIFOs per channel
• Only primary Codec support
先看FIFOs ：
有一个通过AC-link 的20 位IO 移位寄存器。
传输的过程：
When you initialize the AC97 controller, you must assert system reset or cold reset,because we don’t know the previous state of the external AC97 audio-codec.
This assures that GPIO is already ready.
Then you enable the codec ready interrupt. You can check codec ready interrupt by polling or interrupt.
When interrupt is occurred, you mustde-assert codec ready interrupt.
You can now transmit data from memory toregister
or from register to memory by using DMA or PIO (directly to write data toregister).
If internal FIFOs (TX FIFO or RX FIFO) arenot empty, then let data be transmitted. In addition, you can previously turnon AC-Link.
AC-LINK DIGITAL INTERFACE PROTOCOL
Each AC97 Codec incorporates a five-pindigital serial interface that links it to the S3C6410 AC97 Controller. AC- linkis afull-duplex, fixed-clock and PCM digital stream.
It employs a time division multiplexed (TDM)scheme to handle control register accesses and multiple input and output audiostreams. The AC-link architecture divides each audio frame into 12 outgoingand 12 incoming data streams. Each stream has 20-bit sample resolution and requires a DAC and an analog-to-digital converter (ADC) with a minimum 16-bitresolution.
Slot从0到12，大部分是RSRVD。要明白AC-link Frame 还是要读懂下面的解释。
A data transaction is made up of 256 bits ofinformation broken up into groups of 13 time slots and is calleda frame.
Time slot 0 is called the Tag Phase and itis 16 bits long. The other 12 time slots are called the Data Phase. The Tag Phase contains one bit thatidentifies a valid frame and 12 bits that identify the time slots in the DataPhase that contain valid data. Each time slot in the Data Phase is 20 bitslong.
总体的结构是：16+20+20+ … + 20 = 256 bit
A frame begins when SYNC goes high. Theamount of time that SYNC is high corresponds to the Tag Phase.
AC97 frames occur at fixed 48 kHzintervals and are synchronous to the 12.288 MHzbit rate clock, BITCLK. Thecontroller andthe Codec use the SYNC and BITCLK todetermine when to send transmit data and when to sample received data.
A transmitter transitions the serial datastream on each rising edge of BITCLK and a receiver samples the serial datastream on falling edges of BITCLK.
The transmitter must tag the valid slots inits serial data stream. The valid slots are tagged in slot 0. Serial data onthe AC-link is ordered most significant bit (MSB) to least significant bit(LSB). The Tag Phase’s first bit is bit 15 and the first bit of each slot inData Phase is bit 19. The last bit in any slot is bit 0.
如上所说，幀的频率是固定的48 kHz。一幀又可以分为两部分：一部分SYNC为高，发送13个Slot Assignments。第二部分发送二十个为一组的数据。
SDATA_OUT
Slot 0: Tag Phase
Inslot 0, the first bit is a bit (SDATA_OUT, bit 15) which represents thevalidity of the entire frame.
Ifbit 15is a 1, the current frame contains at least a valid timeslot. The next 12 bit positions correspond each 12 times slot contains validdata.
Bits0 and 1of slot 0 are used as CODEC IO bits forI/O reads and writes to the CODEC registers as described in the next section.In this way, data streams of differing sample rate can be transmitted
across AC-link at its fixed 48kHz audioframe rate.
Slot 1: Command Address Port
Inslot 1, it communicates control register address and write/read commandinformation to the AC97 controller.
Whensoftware accesses the primary CODEC, the hardware configures the frame asfollows :
−In slot 0, the valid bit for 1, 2 slots are set.
−In slot 1, bit 19is set (read) or clear(write). Bits 18-12(of slot 1) are configured to specify the index to the CODEC register. Othersare filled with 0’s(reserved).
−In slot 2, it configured with the data, which is for writing because of outputframe.
Slot 2: Command Data Port
Inslot 2, this is the write data with 16-bit resolution.([19:4] is valid data)
Slot 3: PCM Playback Left channel
Slot3, which is audio output frame is the composite digital audio left stream. If asample has a resolution that is less than 16 bits, the AC97 controller fillsall training non-valid bit positions in the slot with zeroes.
Slot 4: PCM Playback Right channel
Slot4, which is audio output frame is the composite digital audio right stream. Ifa sample has a resolution that is less than 16 bits, the AC97 controller fillsall training non-valid bit positions in the slot with zeroes.
ac97 setting:
首先初始化：
ac97_init();
而后初始化声卡，
例如：wm9714
最后使能中断，播放文件：
ac97_int_enable();
打开AC97这边的中断
同时也打开中断控制中AC97对应的位
小插曲：
AC97+wm9713/wm9714用ASOC
IIS+wm8976用ALSA
IIS+uda1341用OSS
Controller Init:
void ac97_init(void)
{
/* 配置GPIO引脚用于ac97 */
GPDCON&= ~(0xfffff);
GPDCON|= 0x44444;
/*初始化AC97中断*/
ac97_int_init();
/******************************
指向AC97中断后的处理函数地址
VIC1VECTADDR4= ac97_irqHandler;
******************************/
/* Cold reset */
AC_GLBCTRL|= (1<<0);
mdelay(1);
AC_GLBCTRL&= ~(1<<0);
/* Warm reset */
AC_GLBCTRL|= (3<<1);
mdelay(1);
AC_GLBCTRL&= ~(1<<1);
mdelay(1);
/*设置AC97控制器，工作于PIO模式*/
AC_GLBCTRL&= ~((3<<12) | (3<<10) | (3<<8));
AC_GLBCTRL|= ((1<<12) | (1<<10) |(1<<8));
//如果是DMA方式，则：AC_GLBCTRL |= ((2<<12) | (2<<10) | (2<<8));
mdelay(1);
AC_GLBCTRL|= (1<<3); /* Transfer dataenable using AC-link*/
/*
* When youcontrol writing or reading, you must set the Read enable bit.
* If you want towrite data to the AC97 Codec, you set the index (or address) of the AC97 Codecand data.
*/
/* read ac97 status */
AC_CODEC_CMD|= (1<<23);
/* If the Readenable bit is 1 and Codec command address is valid, Codec status data is alsovalid. */
if( (AC_GLBSTAT & 3 ) == 3 )
printf("ac97has been active ...\n");
else
printf("ac97init failed ...\n");
}
AC97有三种中断类型：underrun，overrun，threshold
void ac97_irq(void)
{
if(AC_GLBSTAT & (1<<21))
{
/*当输出缓冲区已经没有数据，出发播放下一部分音乐文件*/
pcm_out_underrun_irq();
}
}
When you control writing or reading,you must set the Read enable bit. If you want to write data to the AC97Codec, you set the index (or address) of the AC97 Codec and data.
通过写入该寄存器数据，来初始化复合ac97的声卡。
