~Datasheet - DMA
2440 DMA controller说明：
The S3C2440A supports controller located between the system bus and the peripheral bus.
Each channel of DMA controller can perform data movements between devices in the system bus and/or peripheral bus with no restrictions.
Here, nXDREQ0 and nXDREQ1 represent two external sources (External Devices),
and I2SSDO and I2SSDI represent IIS transmitting and receiving, respectively.
2416貌似更先进些，没有channel对source的限制：
Each channel of DMA controller can select one source among 27 DMA sources if H/W DMA request mode is selected by REQSEL register. (Note that if S/W request mode is selected, this DMA request
Demand Mode
— If XnXDREQ remains asserted, the next transfer starts immediately. Otherwise it waits for XnXDREQ to be asserted.
Handshake Mode
— If XnXDREQ is de-asserted, DMA de-asserts XnXDACK in 2cycles. Otherwise it waits until XnXDREQ is de-asserted.
2440：
(1)DMA 初始源寄存器(DISRC)
(2)DMA初始源控制寄存器(DISRCC)
(3)DMA初始目的寄存器(DIDST)
(4)DMA初始目的控制寄存器(DIDSTC)
(5)DMA控制寄存器(DCON)
(6)DMA状态寄存器(DSTAT)
(7)DMA当前源寄存器(DCSRC)
(8)DMA当前目的寄存器(DCDST)
(9)DMA屏蔽触发寄存器(DMASKTRIG)
配置代码示例：
void dma_init(unsigned long dma_src, unsigned int count) { DISRC0 = dma_src; //源地址S_ADDR Bit [30:0] DISRCC0 = 0; //起始，片上总线AHB DIDST0 = 0x55000010; //目的地址IISFIFO，将一段音乐通过iis总线发给声卡 DIDSTC0 = (1 << 1) | 1; //目的，设备总线APB DCON0 = (1 << 29) | (5 << 24) | (1 << 23) | (1 << 20) | (count >> 1); //DMA一般是半字半字的移动，count >> 1 TC值，自动减一，然后发出中断 } void dma_start(void) { DMASKTRIG0 = (1 << 1); //1: DMA channel is turned on and the DMA request is handled. }
2416：
多媒体性能增强，DMA通道增多，通道对源没了限制。增加了一个寄存器：
DMA REQUESET SELECTION REGISTER (DMAREQSEL)
