How to Creat a Xilinx TCL Script without GUI ? Try the following example:
project new my_proj1.ise
project set family spartan3e
project set device xc3s500e
project set package fg320
project set speed -4
##################################################
# Modify the xfile add argument for the source files in the design
##################################################
puts "Adding Source Files..."
xfile add ../src/dice.vhd
xfile add temp.ucf
##################################################
# Set optional implemenation options here. There is a problem with setting
# project properties that at least one source must be added to the project
# first. Therefore, the "project set" commands are after the "xfile add"
# commands.
##################################################
puts "Setting Project Properties..."
project set "custom compile file list" "fpga_b.prj"
project set "Optimization Effort" High
project set "Cores Search Directories" ../src
project set "Read Cores" true ;# default is true, don't need to set
project set "Macro Search Path" ../src
project set "Map Effort Level" High
project set "Perform Timing-Driven Packing and Placement" 1
project set "Place & Route Effort Level (Overall)" High
# Do not generate the default post place static timing report
project set "generate post-place & route static timing report" false
##################################################
# Run the design.
##################################################
process run "Implement Design"
puts "Implement design done"
process run "Generate Programming File"
puts "Bit file ready!"
project close
puts "project closed!"
(From: http://forums.xilinx.com/xlnx/board/crawl_message?board.id=ISE&message.id=1186)
